similar to: [LLVMdev] Is llc broken for Cortex-A9 + neon ?

Sounds like a bug in vector promote. If I restore this flag and use -promote-elements=0 everything works for me. Please fill a PR in LLVM bugzilla and assign to Nadav. On Mon, Jun 25, 2012 at 5:04 PM, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > Hi all, > > > considering following .ll file > > ; ModuleID = 'vect3x.ll' > target triple =

Hi Anton & Nadav, I filled this problem a while ago here http://llvm.org/bugs/show_bug.cgi?id=13111 Thinking it first was an LLVM opt bug. Shall I assign it to Nadav or create a new one ? Seb ________________________________________ De : Anton Korobeynikov [anton at korobeynikov.info] Date d'envoi : lundi 25 juin 2012 15:31 À : Sebastien DELDON-GNB Cc : LLVMdev at cs.uiuc.edu; Rotem,

When I compile this program *$ cat vararg1-main.c typedef struct { double d; } S0; S0 g1; void foo0(int a, ...); int main(int argc, char **argv) { S0 s0 = { 2.0 }; foo0(1, s0); printf("%f\n", g1.d); * * return 0; }* with this command, *$ clang -target arm-none-linux-gnueabi-gcc -ccc-clang-archs armv7 -emit-llvm vararg1-main.c -S -o vararg1-main.ll -O3* I get this

Yes, I see the load is 8-byte aligned in the bit code. My question was, assuming that arguments requiring double word alignment have to be passed in even/odd registers, how does the backend know that %0 has to be passed in register r2 and r3? *tail call arm_aapcscc void (i32, ...)* @foo0(i32 1, [2 x i32] %0) nounwindt * It doesn't seem that ARM backend can figure out that "[2 x i32]

On Aug 6, 2012, at 3:21 PM, Akira Hatanaka <ahatanak at gmail.com> wrote: > When I compile this program > > $ cat vararg1-main.c > > typedef struct { > double d; > } S0; > > S0 g1; > > void foo0(int a, ...); > > int main(int argc, char **argv) { > S0 s0 = { 2.0 }; > > foo0(1, s0); > > printf("%f\n", g1.d); >

Hi Rotem, Thanks for the quick answer, how do I know which type is legal/illegal with respect to calling convention ? Best Regards Seb > -----Original Message----- > From: Rotem, Nadav [mailto:nadav.rotem at intel.com] > Sent: Thursday, July 05, 2012 11:21 AM > To: Sebastien DELDON-GNB; llvmdev at cs.uiuc.edu > Subject: RE: Vector argument passing abi for ARM ? > > The

Hi I want to give parameters for my function from the shell. I mean I defined a function like these: work1.R : myfunc <- function(x,y) { z = x + y z } and now I want to use shell to give parameters like " ./work1.R (3,5) " to get sum 8. so what should I do? [[alternative HTML version deleted]]

Hi all, I was wondering if there is a defined ABI for passing vector as parameter for ARM target. For instance is this valid to write .ll statement like: ; ModuleID = 'bugconv.ll' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32" target triple = "thumbv7-none-linux-androideabi" define

Hi Duncan, I also thought it was a bug, especially since it worked with LLVM 3.0, but since it is not defined by ABI, I was not sure if I need to submit it as a BUG. I wanted to be sure that it is an actual BUG before submitting it and got the not-a-bug answer. Here is a small example to reproduce the problem I'm experiencing: ; ModuleID = 'bugparam.ll' target datalayout =

Hi all, I'm writting following LLVM assembly: ; ModuleID = 'structaccess.ll' %struct._anon0 = type <{ i32, i32, i32 }> @s = common global %struct._anon0 zeroinitializer define arm_aapcscc void @foo() nounwind { L.entry: store i32 5, i32* getelementptr inbounds (%struct._anon0* @s, i32 0, i32 0) store i32 10, i32* getelementptr inbounds (%struct._anon0* @s, i32 0, i32 1)

I've got Samba up and running on my network, with relativley few problems, but I'm having a problem with subfolders. Lets take this snippet from my smb.conf as an exanple and then I'll move on [Documents] comment = office documents path = /usr/smb_files/documents public = no writeable = yes write list = @secretaries borwseable = yes Let me use this example

See ARMCallingConv.td:113. The alignment of the arg is checked and if it's 8-byte aligned, the proper registers are chosen. deep On Tue, Aug 7, 2012 at 1:20 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: > Yes, I see the load is 8-byte aligned in the bit code. > > My question was, assuming that arguments requiring double word alignment > have to be passed in even/odd

Hi Duncan, What do you mean by "a data layout string in your module" ? Best Regards Seb 2011/10/18 Duncan Sands <baldrick at free.fr> > Hi Seb, > > > I'm writting following LLVM assembly: > > > > ; ModuleID = 'structaccess.ll' > > > > not having a data layout string in your module disables many optimizations. > > Ciao,

Hi Sebastien, > Thanks for the quick answer, how do I know which type is legal/illegal with respect to calling convention ? the code generators are supposed to produce working code no matter what the parameter type is. The fact that the ARM ABI doesn't specify how <2 x i8> is passed just means that the code generators can pass it using whatever technique it feels like (since it

Hi Sebastien, > I also thought it was a bug, especially since it worked with LLVM 3.0, but since it is not defined by ABI, I was not sure if I need to submit it as a BUG. yes it is a bug. > I wanted to be sure that it is an actual BUG before submitting it and got the not-a-bug answer. I didn't read Nadav's reply as saying there was no bug, in fact he explicitly said in his email

Hi Seb, > I'm writting following LLVM assembly: > > ; ModuleID = 'structaccess.ll' > not having a data layout string in your module disables many optimizations. Ciao, Duncan. > %struct._anon0 = type <{ i32, i32, i32 }> > > @s = common global %struct._anon0 zeroinitializer > > define arm_aapcscc void @foo() nounwind { > L.entry: > store i32

The argument passing calling convention is undefined for illegal types, such as <2 x i8>. The invalid misaligned loads on ARM sounds like a bug in the ARM backend. -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Sebastien DELDON-GNB Sent: Thursday, July 05, 2012 12:14 To: llvmdev at cs.uiuc.edu Subject: [LLVMdev] Vector

Hi all, I'm using my own front-end that generates LLVM debug info metadata. I was using LLVM 2.9 debug version and I'm moving to LLVM 3.2 debug version of metadata. On my example I got llc 3.2 to fail on following assertion: llc: /work1/tools/llvm/3.2/sources/lib/CodeGen/AsmPrinter/DwarfDebug.cpp:1471: void llvm::DwarfDebug::endFunction(const llvm::MachineFunction*): Assertion `TheCU

hi all I've a few guest which work/run perfectly fine, I believe, except for autostart. Configuration of system, gluster and libvirt is pretty regular and not complex. Errors I see: ... failed to initialize gluster connection (src=0x7f9424266350 priv=0x7f94242922b0): Transport endpoint is internal error: Failed to autostart VM 'rhel-work2': failed to initialize gluster connection

On 19 October 2010 07:57, Jin Gu Kang <jaykang10 at imrc.kist.re.kr> wrote: > Frist, I have been implementing common type for struct type on bitcode > at compilation time using llvm-gcc and then changing common type to target > specific types at code generation time using llc (reconstruct StructLayout). Hi Jin, Apart from bitfields and unions, the struct type is pretty much target