similar to: [LLVMdev] Why can not sparcv9 backend handle i64 produced by FrameIndex?

sorry, llc -march=hexagon -mcpu=hexagonv2 test.ll -o test.s works. 2012/7/3 Triple Yang <triple.yang at gmail.com>: > hi, > > does someone notice that llc options "-march=hexagon" and > "-march-sparcv9" do not work well under llvm 3.1? > > Following is a brief description: > (1) test.c file > > int cmp(int i, int j) { > return

hi, does someone notice that llc options "-march=hexagon" and "-march-sparcv9" do not work well under llvm 3.1? Following is a brief description: (1) test.c file int cmp(int i, int j) { return (i>j)?1:0; } (2) test.ll file (clang -emit-llvm test.c -S -o test.ll) ; ModuleID = 'test.c' target datalayout =

Here's the IR I'm trying to compile for my backend, a 16-bit CPU: ; ModuleID = 'foo.c' source_filename = "foo.c" target datalayout = "E-m:e-p16:16:16-i1:16:16-i8:16:16-i16:16:16-i32:16:16-i64:16:16-S16-n16" target triple = "tms9900" @global_var = common global i16 0, align 2 ; Function Attrs: noinline nounwind optnone define signext i16 @dothis(i16

Hi, I'm trying to use llvm/clang to cross compile to sparcv9. The following works with a -march=sparc, but yields errors for sparcv9. Are there some other flags that need to be specified? Thanks, Tarun > clang -m64 -emit-llvm test.c -c -o test.bc > llc -march=sparcv9 test.bc -o hello.s ExpandIntegerResult #0: 0x8a6c478: i64 = GlobalAddress<[4 x i8]* @.str> 0 [ORD=1] [ID=0] Do

On Dec 3, 2007, at 12:53 PM, Vladimir Prus wrote: > > Suppose I have a target that does not have register+constant > addressing mode. Then, I have DAG like: > > (store ..., (frameindex)) > > Targets like SPARC have the following patterns to catch this: > > def ADDRri : ComplexPattern<i32, 2, > "SelectADDRri", [frameindex], []>; > def STri :

Evan Cheng wrote: > > On Dec 3, 2007, at 12:53 PM, Vladimir Prus wrote: > >> >> Suppose I have a target that does not have register+constant >> addressing mode. Then, I have DAG like: >> >> (store ..., (frameindex)) >> >> Targets like SPARC have the following patterns to catch this: >> >> def ADDRri : ComplexPattern<i32, 2,

Hi All I'm having nightmares with FrameIndexes during my backend development :( I have ComplexPatterns defined for my two addressing modes (RR and RI). Most of the time, FrameIndex operands appear to be on load/store nodes, in which case everything works fine as my custom addressing modes matchers work fine. Unfortunately, I now have an add node which has a FrameIndex operand (this results

Suppose I have a target that does not have register+constant addressing mode. Then, I have DAG like: (store ..., (frameindex)) Targets like SPARC have the following patterns to catch this: def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", [frameindex], []>; def STri : F3_2<3, 0b000100, (outs), (ins MEMri:$addr, IntRegs:$src),

On 27 Jun 2015, at 16:13, escha <escha at apple.com> wrote: > >> >> Hi, >> >> I recently started helping with the LLVM AVR backend [1]. The AVR is an 8 bit core with pointer type i16. That makes pointers illegal in the SelectionDAG. As far as I understand it, it is the backends job to legalize these nodes by using the ReplaceNodeResults/LowerOperation callbacks.

Hi,all: i have a question about llvm162227,recently i have a work about cBackend,i found a the Module data is different from llvm2.9,a pass named CBackendNameAllUsedStructsAndMergeFunctions() was removed.for this the module data can not be translated correctly. when i try to rewrite this pass,i found much interfaces of module have been changed. i write a test which contian a struct like this

On Tue, Jun 25, 2019 at 9:59 AM Tim Northover <t.p.northover at gmail.com> wrote: > On Tue, 25 Jun 2019 at 06:26, Gleb Popov via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > >> While the store is being selected LLVM will just treat the value being > >> stored as a generic pointer-width integer unless you have written a > >> specific pattern for

On Wed, Jun 26, 2019 at 12:38 PM Tim Northover <t.p.northover at gmail.com> wrote: > Hi Gleb, > > On Wed, 26 Jun 2019 at 07:28, Gleb Popov <6yearold at gmail.com> wrote: > > def StoreStackF : InstRI<2, (outs), (ins IntRegs:$reg, i32imm:$i), > > "storestackf $reg, [$i]", [(store_stack i32:$reg, > AddrFI:$i)]>; > > >

Hi, I'm try to lower the store LLVM-IR instruction as per the following LLVM IR program: *** IR Dump After Module Verifier *** define void @storeloadi32() { %ptr = alloca i32 store volatile i32 12, i32* %ptr ret void } The target instruction is associated to the store like this: def MOVSUTO_A_iSLr : CLPFPU_A_iSLr<0b1000001101,

Hi there, I have a mem address pattern basically copied from Sparc: def ADDRri : ComplexPattern<iPTR, 2, "SelectADDRri", [frameindex],[]> It can match FrameIndex<0> but was unable to match FrameIndex<1>. What is the difference between the two? How to match FrameIndex<1>? Thanks, Xiaochu -------------- next part -------------- An HTML attachment was scrubbed...

aha, that's quite straightforward. 2012/8/29 Changcheng Wang <changcheng at multicorewareinc.com>: > hi,yang: > i had delete the temporary files,sorry to trouble you. > it is so easy: // RUN: rm .... > > Regards > changcheng > > On Wed, Aug 29, 2012 at 2:41 PM, Changcheng Wang > <changcheng at multicorewareinc.com> wrote: >> hi,yang: >> how

hi,yang: i had realized the test. thanks for your help! yours, changcheng On Tue, Aug 28, 2012 at 8:58 PM, Triple Yang <triple.yang at gmail.com> wrote: > That example is a standalone one which means you can run it without > extra modification. > Feel free to try it. > > 2012/8/28 Changcheng Wang <changcheng at multicorewareinc.com>: >> hi,yang: >> sorry to

hi,yang: thanks for your help! my net is so poor that i can not donwload your attachment. would you like to paste here,or send to my other email:200005275 at 163.com? yours changcheng On Tue, Aug 28, 2012 at 11:43 AM, Triple Yang <triple.yang at gmail.com> wrote: > Wang, > > Attachment is a simple example, you may put it in test/CodeGen, and run with > > llvm-lit C90 >

hi,yang: another question，i write a test like this: /*****test start******/ ; RUN: llc -march=c < %s | FileCheck %s ; ModuleID = 'hello.c' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64- f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128- n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private

Hi all, I've been working on a backend of our architecture and noticed llvm performs following combining although one of operands is FrameIndex. Combining: t114: i64 = add FrameIndex:i64<0>, Constant:i64<56> Creating new node: t121: i64 = or FrameIndex:i64<0>, Constant:i64<56> ... into: t121: i64 = or FrameIndex:i64<0>, Constant:i64<56> This

hi,yang: how can i remove the temporary files? if i can remove them,all is ok! yours: changcheng On Wed, Aug 29, 2012 at 2:14 PM, Changcheng Wang <changcheng at multicorewareinc.com> wrote: > hi,yang: > sorry to trouble you another time,i used your example and it run > well,but a problem came,it create severel temporary files i chaged the > RUN: line but failed. > i changed