similar to: [LLVMdev] llvm dev positions at MIPS

I earlier posted regarding junior level llvm positions at MIPS. I had a typo in my email in case anyone had trouble sending. rkotler at mips.com Senior is possible . It's a small team and we have fun things we all work on but we also have to all pitch in on less exciting tasks for a senior level person. That is the main reason for the "junior" adjective. So you could get tasked

Geting a seg fault. Have not investigted the cause. rkotler at mipsswbrd002:~/richard$ tar vfxz ~/Downloads/ellcc-mips-linux-2014-Mar-24-07-32-26.tgz rkotler at mipsswbrd002:~/richard/ellcc/bin$ gdb ./ecc GNU gdb (GDB) 7.4.1-debian Copyright (C) 2012 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are

My understanding was that micro mips was similar to Thumb2, in that the smaller encodings have constraints on which registers can be read/written, because of the narrowing of the register fields in the encoding. If that's the case, then it definitely makes sense to model the micro mips instruction set as distinct from the mips32 instruction set, in basically the same way that Thumb2 is done.

In case anyone is interested.... We don't need to compile llvm/clang using gcc anymore for the building of mips hosted llvm compilers. We build a linux mips hosted compiler starting with llvm/clang on x86 linux using the normal configure scripts and then can use that resulting compiler to build further llvm/clang native compilers on the mips linux host. The cross compiler and native

Micro mips is really 100% .s compatible with mips32. There are no register field size constraints and such. It's a strict superset of mips32. For the gcc port, the assembler is basically the only thing we changed. The gcc port was just adding the ".micromips" directive to the .s file and maybe some tiny driver work. That is the quandary. The entire .td file would have to be

The problem is that everything about the mips32 and micro mips 16 instruction is the same, aside from the encoding in to binary. Seems like maybe we need to extend the notion of an instruction so that it can have alternate encodings depending on subtarget. On 09/05/2012 08:28 PM, Jim Grosbach wrote: > The instructions are defined by their encodings, not the assembly syntax. You want

On Sat, Aug 24, 2013 at 2:15 AM, Reed Kotler <rkotler at mips.com> wrote: > Hi Jun, > > Are you using the Mips compiler or working on it? > > yes, i am looking at its code to understand this architecture. thanks. Jun > > On 08/22/2013 11:12 PM, Jun Koi wrote: > >> hi, >> >> there are two arrays named DecoderTable32[] and DecoderTable16[] that

The instructions are defined by their encodings, not the assembly syntax. You want separate instruction definitions for the different encodings and select. Between them in the assembler via sub target features. See ARM handling of thumb vs thumb2 vs arm for examples of how to do this. On Sep 5, 2012, at 6:59 PM, reed kotler <rkotler at mips.com> wrote: > The micro mips processor

We are considering running clang format on the whole Mips target. Is there any rule against this? Is there any good argument against doing this even if there is no rule against it? TIA. Reed

We want to switch running our slave bot with clang/llvm instead of gcc. We have the following proposed patch. We can't test this in our environment but will monitor and adjust if there are issues. svn co http://llvm.org/svn/llvm-project/zorg/trunk zorg mips-builder.patch Index: buildbot/osuosl/master/config/builders.py ===================================================================

I propose that we make Akira Hatanaka the code owner for the Mips code generator. He has worked on the Mips code generator for four years now and done high quality work that whole time. He is the key person inside of Mips for reviewing patches and giving advice to other developers regarding new Mips work. To assure the future quality of the Mips port, I think it makes sense to formalize

The micro mips processor assembly language is basically 100% the same as mips32/mips64. There are some assembler directives you add but for a base port, but that is all you need to do. However, the binary instruction encoding is entirely different. There are a combination of 16 and 32 bit instruction encodings. The question is, what's the best way to handle this? Extending tablegen ?

YOu have to look for which DAG fragments are not being matched. Then you can create patterns for those using alternate sequences. When you disablea given instruction, don't just disable it, but also look at what pattern it was matching. Then create a patten for that using remaining instructions or in some cases you might have to call a library function, as in the case of floating

Thanks for your reply. We are trying to implement a simple Mips-based CPU with just for teaching purpose, so we delete some instructions which are not commonly used, thus the task won't be too hard for students. I am responsible for modifying the compiler so that the compiler won't emit unsupported instructions. In order to avoid "can not select" error, I am trying to expand

On 20 December 2013 15:52, reed kotler <rkotler at mips.com> wrote: > We are considering running clang format on the whole Mips target. > > Is there any rule against this? I don't think there is a rule, but even simpler things like "remove all trailing spaces" were not common in the past > Is there any good argument against doing this even if there is no rule >

We are starting to look at the mips16 and micro mips ports. There are various design issues that people may have some good input on. Especially in how to structure the TD files and other optimizer issues. Mips16 is sort of like thumb and Micro Mips like thumb2 as far as I understand. Mips16 or Micro Mips can live inside of either MIPS32 or MIPS64. In gcc, it's possible using attributes to

On Fri, Jan 20, 2012 at 1:59 PM, reed kotler <rkotler at mips.com> wrote: > We are starting to look at the mips16 and micro mips ports. > > There are various design issues that people may have some good input on. > Especially in how to structure the TD files and other optimizer issues. > > Mips16 is sort of like thumb and Micro Mips like thumb2 as far as I > understand.

Great Job! If I use alternate-clang-driver, will I need mips-gcc still? I mean alternate-clang-driver use as&ld directly or by calling gcc? Regards, Jia Liu On Tue, Feb 28, 2012 at 10:39 AM, reed kotler <rkotler at mips.com> wrote: > There is also: > > 1) an alternate clang driver at > http://code.google.com/p/alternate-clang-driver/ . This makes > it more or less gcc

There is also: 1) an alternate clang driver at http://code.google.com/p/alternate-clang-driver/ . This makes it more or less gcc compatible. 2) there is a way to invoke it all directly with just a call to clang as is with x86/linux but it's not totally finished. i will try and post something about this. the direct form will work if you are on a mips linux machine but there are still some

On 12/20/2013 11:18 PM, Rafael Espíndola wrote: > On 20 December 2013 15:52, reed kotler <rkotler at mips.com> wrote: >> We are considering running clang format on the whole Mips target. >> >> Is there any rule against this? > > I don't think there is a rule, but even simpler things like "remove > all trailing spaces" were not common in the past