similar to: [LLVMdev] Legalizing truncating store using atomic load.

Displaying 20 results from an estimated 3000 matches similar to: "[LLVMdev] Legalizing truncating store using atomic load."

2012 May 31
1
[LLVMdev] Legalizing truncating store using atomic load.
Hi Lei, Le 31/05/2012 03:44, Lei Mou a écrit : > Problem solved by returning the second result of the ATOMIC_LOAD_OR node... You got the chain instead of the loaded value. IMHO, a better solution would have been to add a Pat<> rule to match truncstores and expand them into target store/load/and/or. Pat : <(truncstore16 GPR:$val, MEM:$mem), (store MEM:$mem, (or
2012 May 31
0
[LLVMdev] Legalizing truncating store using atomic load.
Problem solved by returning the second result of the ATOMIC_LOAD_OR node... On Wed, May 30, 2012 at 9:38 PM, Lei Mou <lei.mou.uu at gmail.com> wrote: > Hi, > > Our target only has native support for i32 and f32 types. For data > types smaller than these, I have to custom lowering truncating store > using two atomic load instruction (which have the same semantics as >
2012 Apr 16
2
[LLVMdev] Question about PTXFrameLowering
Hi all, I'm learning the PTX backend and confused by the following problem. In the constructor of PTXFrameLowering, StackAlignment and LocalAreaOffset are assigned 2 and -2, respectively. Since PTX has neither stack frame nor stack pointer, why StackAlignment and LocalAreaOffset are needed and where does 2 and -2 come from? Any explanation is appreciated. Thank you in advance! Yours
2012 Apr 16
0
[LLVMdev] Question about PTXFrameLowering
On Mon, Apr 16, 2012 at 3:48 AM, Lei Mou <lei.mou.uu at gmail.com> wrote: > Hi all, > > I'm learning the PTX backend and confused by the following problem. In the > constructor of PTXFrameLowering, StackAlignment and LocalAreaOffset are > assigned 2 and -2, respectively. Since PTX has neither stack frame nor > stack pointer, why StackAlignment and LocalAreaOffset are
2012 May 24
2
[LLVMdev] [TableGen] How to specify multiple types to one register class.
Hi all, In our architecture, there is a set of general purpose registers which could be used to store integer and floating point numbers. My problem is how to correctly specify the type of this register class. For now, its type is specified as i32, and it is problematic if it is used in floating point instructions, since tablegen cannot correctly infer the type information of such a pattern. Here
2012 Apr 18
2
[LLVMdev] Conceptual difference between "Unallocatable" and "Reserved" registers.
Hi, I'm writing to ask the differences between a "reserved" register and an "unallocable" register. In X86 backend, for example, the stack pointer register and instruction pointer are reserved but allocatable. In the Doxygen document of function llvm::TargetRegisterInfo::getReservedRegs, it says that a reserved register is one that *has particular uses and should be
2012 May 24
0
[LLVMdev] [TableGen] How to specify multiple types to one register class.
On Thu, May 24, 2012 at 10:25:36PM +0800, Lei Mou wrote: > Hi all, > > In our architecture, there is a set of general purpose registers which could be > used to store integer and floating point numbers. My problem is how to correctly > specify the type of this register class. For now, its type is > specified as i32, and > it is problematic if it is used in floating point
2011 Apr 01
0
[LLVMdev] Assert in VerifySDNode
Hi Micah, >>> assert(!isa<MemSDNode>(N)&& "Bad MemSDNode!"); >> >> you can't use getNode to allocate a MemSDNode because it does not >> allocate >> enough memory (MemSDNode has extra fields beyond the operands). >> > [Villmow, Micah] Duncan, thanks for the reply. But I don't see how I am generating a MemSDNode with this
2011 Apr 01
2
[LLVMdev] Assert in VerifySDNode
> -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Duncan Sands > Sent: Thursday, March 31, 2011 7:43 PM > To: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] Assert in VerifySDNode > > Hi Micah, > > > assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); > > you
2012 Apr 18
0
[LLVMdev] Conceptual difference between "Unallocatable" and "Reserved" registers.
On Apr 17, 2012, at 9:09 PM, Lei Mou wrote: > I'm writing to ask the differences between a "reserved" register and an "unallocable" register. In X86 backend, for example, the stack pointer register and instruction pointer are reserved but allocatable. In the Doxygen document of function llvm::TargetRegisterInfo::getReservedRegs, it says that a reserved register is one
2018 Sep 20
3
future time stamps warning
Time stamps are correct and my system time is correct. I am now tried to use Sys.setFileTime() to update time stamps as proposed. This does not help. The windows and debian builds give different reports on the time stamp issue. https://win-builder.r-project.org/incoming_pretest/eurostat_3.2.8_20180920_122655/Windows/00check.log
2018 Sep 20
3
future time stamps warning
Dear developers, Upon CRAN submission I have bumped into "future file timestamps" warning that I can't solve. I have updated the package as usual, and all checks go through in my system. CRAN reports the following warning however. * checking for future file timestanps ... WARNING Files with future time stamps: DESCRIPTION NAMESPACE README.md The build log is at
2006 May 22
10
US telco lingo
Could someone explain to a non-US dummy the following phrases I have seen on the list. "I can provide you with tier 1 termination 6/6. I can blend or NPANXX breakout." "We provide US48 termination, blended rate for 1 MOU and above is .008 with 6/6." What is 6/6? What is US48? What is blended? What is MOU? What is NPANXX breakout? -------------- next part --------------
2002 Feb 20
8
map_ptr warning
I am trying to finalize the use of rsync for updatiung a new nfs server before we take the old one offline. I keep getting the following warning during the rsync process: Warning: unexpected rad size of 0 in map_ptr Any ideas where this comes from and how to make it go away? I am using rsync 2.5.2 on Solaris 8 to pull data from rsync 2.5.2 on Solaris 7. Bob roconnor@vectorpartners.com
2012 Jun 01
0
[LLVMdev] legalization of truncating stores in LegalizeDAG.cpp
Hi Akira, On 01/06/12 02:27, Hatanaka, Akira wrote: > In LegalizeDAG.cpp, truncating stores are custom-lowered in line 1314-1317: > > 1314 case TargetLowering::Custom: > 1315 ReplaceNode(SDValue(Node, 0), > 1316 TLI.LowerOperation(SDValue(Node, 0), DAG)); > 1317 break; > > Is there a reason it doesn't check whether the
2012 Jun 01
2
[LLVMdev] legalization of truncating stores in LegalizeDAG.cpp
In LegalizeDAG.cpp, truncating stores are custom-lowered in line 1314-1317: 1314 case TargetLowering::Custom: 1315 ReplaceNode(SDValue(Node, 0), 1316 TLI.LowerOperation(SDValue(Node, 0), DAG)); 1317 break; Is there a reason it doesn't check whether the SDValue returned from TargetLowering::LowerOperation is null before it replaces the
2010 May 19
4
xen4.0.0 64 bit boot "panic on cpu 0, crc errror"
Hi experts, I boot the xen4.0.0 with gpxe and boot xen 32 bit works well but when I try boot xen 64 bit, the error happens (XEN)Brought up 16 cpus (XEN) *** LOADING DOMAIN 0 *** (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) crc error (XEN) **************************************** Can you give me a light? Thanks Lei -- "We learn from failure, not from
2010 May 19
4
xen4.0.0 64 bit boot "panic on cpu 0, crc errror"
Hi experts, I boot the xen4.0.0 with gpxe and boot xen 32 bit works well but when I try boot xen 64 bit, the error happens (XEN)Brought up 16 cpus (XEN) *** LOADING DOMAIN 0 *** (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) crc error (XEN) **************************************** Can you give me a light? Thanks Lei -- "We learn from failure, not from
2010 May 13
5
what does "initrd-2.6.32.9.img" contains
Hi all If I use nfsroot boot the xen dom0, I find it works well if not use initrd-2.6.32.9.img. what does "initrd-2.6.32.9.img" contains? Thanks Lei -- "We learn from failure, not from success!" _______________________________________________ Xen-users mailing list Xen-users@lists.xensource.com http://lists.xensource.com/xen-users
2008 Aug 01
2
Exporting data to a text file
HI R users With clara function I get a data frame (maybe this is not the exact word, I'm new to R) with the following variables: > names(myclara) [1] "sample" "medoids" "i.med" "clustering" "objective" [6] "clusinfo" "diss" "call" "silinfo" "data" I want to