similar to: [LLVMdev] [PATCH] OpenCL half support

Displaying 20 results from an estimated 400 matches similar to: "[LLVMdev] [PATCH] OpenCL half support"

2012 May 17
0
[LLVMdev] [PATCH] OpenCL half support
Hi David, Many thanks for the comments! > Tha 0xH format should be described in LangRef.html alongside > 0xK<hex> and 0xM<hex> Done. > Declaration of "int shiftcount" should be moved to smallest nesting > possible, right after "if ( const ConstantFP ..." at line 710 > > (The code makes a lot more sense with a good comment on the
2012 May 17
3
[LLVMdev] [PATCH] OpenCL half support
looks good here. > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Anton Lokhmotov > Sent: Thursday, May 17, 2012 4:51 AM > To: 'David Neto' > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] [PATCH] OpenCL half support > > Hi David, > > Many thanks for the comments! > >
2012 May 17
0
[LLVMdev] [PATCH] OpenCL half support
Anton, would it be possible to add information to the documentation here: http://llvm.org/docs/BitCodeFormat.html > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Villmow, Micah > Sent: Thursday, May 17, 2012 9:04 AM > To: Anton.Lokhmotov at arm.com; 'David Neto' > Cc: llvmdev at cs.uiuc.edu >
2007 Aug 14
1
[LLVMdev] Static functions for APInt
This adds a bunch of static functions that implement unsigned two's complement bignum arithmetic. They could be used to implement much of APInt, but the idea is they are enough to implement APFloat as well, which the current APInt interface is not suited for. Neil. -------------- next part -------------- Index: include/llvm/ADT/APInt.h
2015 Jan 14
2
[LLVMdev] Bug in InsertElement constant propagation?
Hi, When I run opt on the following LLVM IR: define i32 @foo() { bb0: %0 = bitcast i32 2139171423 to float %1 = insertelement <1 x float> undef, float %0, i32 0 %2 = extractelement <1 x float> %1, i32 0 %3 = bitcast float %2 to i32 ret i32 %3 } -> It generates: define i32 @foo() { bb0: ret i32 2143365727 } While tracking the value I see that the floating point value
2012 Feb 10
1
[LLVMdev] Prevent DAG combiner from changing "store ConstFP, addr" to integer store
This code lives in DAGCombiner.cpp: ------------- // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr' if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) { // NOTE: If the original store is volatile, this transform must not increase // the number of stores. For example, on x86-32 an f64 can be stored in one // processor operation but
2013 May 07
1
[LLVMdev] Why is there no ashl/lshl?
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Tim Northover > In contrast, it's not quite clear what an arithmetic left-shift would > be. If you want to keep x << 1 == x*2 then the logical one already > does this. Only if the left-most (shiftcount + 1) bits are all-0 or all-1. I've used machines that distinguished
2007 Aug 18
1
[LLVMdev] Soft floating point support
This patch supplies software IEEE floating point support. The comment from the patch reproduced below says all there is to say. This patch contains the prior "cleanup" patch; please don't apply that one. Please let me know of any bugs. It is tested reasonably well, but until I put together random tests it's hard to have 100% confidence. Neil. /* A self-contained host- and
2014 May 05
3
[LLVMdev] get unsigned integer pattern for ConstantFP
What is the proper way to get the bit pattern associated with a ConstantFP? The 32 bit pattern if MVT::f32 or pair of 32 bit patterns with MVT::f64 ? Tia. Reed
2010 Apr 20
0
[LLVMdev] Fwd: Re: NaNs and Infinities
I forgot to forward to the rest of the list... -------- Original Message -------- Subject: Re: [LLVMdev] NaNs and Infinities Date: Mon, 19 Apr 2010 23:41:43 -0700 From: Javier Martinez <javier at jmartinez.org> To: lost <lostfreeman at gmail.com> Hi, If it's an immediate you can cast the SDValue to a ConstantFP and use the isNaN() or isInfinity() member functions (see below).
2019 Sep 26
2
ConstantFP->getType() is not right
Hi, I want to create a double constant from a float constant, here's my code: auto* constFloat1 = static_cast<llvm::ConstantFP*>(llvm::ConstantFP::get(llvm::Type::getFloatTy(context), 3.1)); assert(constFloat1->getType() == llvm::Type::getFloatTy(context)); auto* constFloat2 = llvm::ConstantFP::get(llvm::Type::getDoubleTy(context), constFloat1->getValueAPF());
2015 Jan 20
2
[LLVMdev] Bug in InsertElement constant propagation?
Does anybody else have an opinion on this issue? I'm planning to submit a patch which would add a new get method for ConstantDataVector taking an ArrayRef<Constant*> and use that in the few places in constant propagation where convertToFloat is used. Let me know if you think there is a more obvious way to do it. Right now the only way to create a ConstantDataVector are those method:
2014 Sep 19
2
[LLVMdev] More careful treatment of floating point exceptions
Hi Sanjay, Thanks, I saw this flag and it's definitely should be considered, but it appeared to me to be static characteristic of target platform. I'm not sure how appropriate it would be to change its value from a front-end. It says "Has", while optional flag would rather say "Uses" meaning that implementation cares about floating point exceptions. Regards, Sergey
2010 Apr 19
1
[LLVMdev] NaNs and Infinities
Hello! How can I test if floating-point value is NaN or positive/negative infinity?
2013 May 07
0
[LLVMdev] Why is there no ashl/lshl?
Hi, > There is a distinction between logical/arithmetic shift right, but why > not for shift left? The arithmetic right shift has the nice property that it preserves the fact that x >> 1 == x/2 for negative signed numbers (unlike the logical shift). Either because of this or because of other uses I can't think of right now almost all modern CPUs implement it in hardware, and
2013 May 07
3
[LLVMdev] Why is there no ashl/lshl?
There is a distinction between logical/arithmetic shift right, but why not for shift left? I'm also a bit confused by one example in the reference manual: <result> = lshr i8 -2, 1 ; yields {i8}:result = 0x7FFFFFFF Is this an error in the manual? The result is supposed to be an i8 yet a i32 is shown. -- edA-qa mort-ora-y -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
2012 Apr 16
2
[LLVMdev] Representing -ffast-math at the IR level
Thanks for the updates! Minor comments: + if (!Accuracy) + // If it's not a floating point number then it must be 'fast'. + return HUGE_VALF; Can we add an assert instead of a comment? It's just as documenting and will catch any goofs. + // If it's not a floating point number then it must be 'fast'. + return !isa<ConstantFP>(MD->getOperand(0));
2015 Aug 10
2
Bug or expected behavior of APFloat class?
Hi, I've been playing around with the APFloat class lately and I came across behavior I was not expecting based on reading the implementation comments and I'm wondering if it's a bug or intentional. The behavior concerns converting an APFloat to a string and back again. In the implementation of ``APFloat::toString(...)`` you can specify ``FormatPrecision`` as 0. The method comments
2012 Apr 16
0
[LLVMdev] Representing -ffast-math at the IR level
Here's a revised patch, plus patches showing how fpmath metadata could be turned on in clang and dragonegg (it seemed safest for the moment to condition on -ffast-math rather than on one of the flags implied by -ffast-math). Major changes: - The FPMathOperator class can no longer be used to change math settings, only to read them. Currently it can be queried for accuracy info. I split the
2015 Jan 22
3
[LLVMdev] numeric limits of llvm Types?
Hi all, can I access the numeric limits of the llvm types, e.g. HalfTy, FloatTy, DoubleTy, etc. in a fashion like the std numeric_limits tool? std::numeric_limits<half>::min() std::numeric_limits<half>::max() In c++API, I want to initialize values and need to know the correct range for the llvm types.... Thx Alex