similar to: [LLVMdev] Directive parsing for AsmParser

Displaying 20 results from an estimated 200 matches similar to: "[LLVMdev] Directive parsing for AsmParser"

2010 Jun 21
2
[LLVMdev] MC: Object file specific parsing
Hi Daniel, attached is a patch that pushes most of the object file specific parsing out of AsmParser and down into MachOAsmParser. This was done as a cleanup for the ELF work. I know that you're not happy with this approach, particularly the fact that as we add more object file formats and assembler dialects, it's going to cause a class explosion. But I was hoping that we could use this
2013 Feb 20
3
[LLVMdev] Is va_arg correct on Mips backend?
I didn't have Mips board. I compile as the commands and check the asm output as below. 1. Question: The distance of caller arg[4] and arg[5] is 4 bytes. But the the callee get every arg[] by 8 bytes offset (arg_ptr1+8 or arg_ptr2+8). I assume the #BB#4 and #BB#5 are the arg_ptr which is the pointer to access the stack arguments. 2. Question: Stack memory 28($sp) has no initial value. If
2013 Feb 20
0
[LLVMdev] Is va_arg correct on Mips backend?
Does it make a difference if you give the "-target" option to clang? $ clang -target mips-linux-gnu ch8_3.cpp -o ch8_3.bc -emit-llvm -c The .s file generated this way looks quite different from the one in your email. On Tue, Feb 19, 2013 at 5:06 PM, Jonathan <gamma_chen at yahoo.com.tw> wrote: > I didn't have Mips board. I compile as the commands and check the asm >
2012 Feb 17
0
Passing a value to js.erb
Rails 3.1.3 I''m trying to pass a value to ''save.js.erb'' . in the view, I have put <%= hidden_field_tag "video-id", @video.id, { :id => "video-id" } %> then, I can retrieve it by var idval = $(''#video-id'').val(); It certainly gets the value. The problem is then I need to pass it to the following. I tried,
2011 Nov 11
4
[LLVMdev] How to get MIPS from clang + llvm ?
I was told that I can use clang + llvm to get MIPS instructions on my x86 machine. I did following command and got error below. Does anyone have any idea ? or can someone suggest me how to get MIPS instructions easily from llvm. clang -ccc-host-triple mips-unknown-linux -ccc-clang-archs mips helllo.c clang: warning: unknown platform, assuming -mfloat-abi=soft '+' is not a recognized
2018 Sep 06
3
How to add Loongson ISA for Mips target?
Hi LLVM developers, GCC[1] is able to use Loongson ISA[2] for instruction selection: $ cat hello.c #include <stdio.h> int main(int argc, char *argv[]) { printf("Hello World\n"); return 0; } $ gcc -O0 -S hello.c $ cat hello.s .file 1 "hello.c" .section .mdebug.abi64 .previous .nan legacy .gnu_attribute 4, 1 .abicalls
2012 Nov 11
2
[LLVMdev] Tracing nodes in selectionDAG to final code...
Hello everyone. I use this command clang -emit-llvm hello.c -c -o hello.bc llc hello.bc -march=mipsel -relocation-model=static -o hello.s to produce this MIPS code: .section .mdebug.abi32 .previous .file "hello.bc" .text .globl main .align 2 .type main, at function .set nomips16 # @main .ent main main: .cfi_startproc .frame $sp,32,$ra .mask 0x80000000,-4 .fmask
2013 Feb 04
2
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Hi, > Can you post the llc command line you're using? Can you post an LLVM IR > file that causes this behavior? yes: ${LLVM_PATH}/bin/llc -o helloworld.s -march=nvptx helloworld.ll where LLVM_PATH my local installation path for LLVM. Also attaching helloworld.c: #include <stdio.h> int main(void) { printf("Hello World!\n"); return 0; } and helloworld.ll:
2018 Sep 06
2
How to add Loongson ISA for Mips target?
- my old email address. The ISA_* classes might not be the best choice for this. There's an overall hierarchy and ordering to the ISA_* classes since they represent the generations of the MIPS ISA. If these extensions are available in Loongson chips based on MIPS32r1 and MIPS32r2 for example, it becomes difficult to describe with ISA_* classes without duplicating instruction definitions or
2014 Mar 11
4
[PATCH] add mips64 support
From: Dejan Latinovic <Dejan.Latinovic at imgtec.com> --- usr/include/arch/mips64/klibc/archconfig.h | 3 + usr/include/arch/mips64/klibc/archsetjmp.h | 39 ++++++ usr/include/arch/mips64/machine/asm.h | 76 ++++++++++ usr/include/fcntl.h | 2 +- usr/include/sys/md.h | 1 + usr/include/sys/resource.h | 4 +-
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Alright, couple of points here: 1. Address space 0 is invalid for global variables. This is causing a crash in llc where we use llvm_unreachable() on this case. This is most likely why you're seeing llc run forever. The fix for this is to use address space 1 for globals, which puts them into PTX global memory. On our side, we should provide a meaningful error message in this case. 2. The
2013 Feb 19
0
[LLVMdev] Is va_arg correct on Mips backend?
Which part of the generated code do you think is not correct? Could you be more specific? I compiled this program with clang and ran it on a mips board. It returns the expected result (21). On Tue, Feb 19, 2013 at 4:15 AM, Jonathan <gamma_chen at yahoo.com.tw> wrote: > I check the Mips backend for the following C code fragment compile result. > It seems not correct. Is it my
2013 Feb 19
2
[LLVMdev] Is va_arg correct on Mips backend?
I check the Mips backend for the following C code fragment compile result. It seems not correct. Is it my misunderstand or it's a bug. //ch8_3.cpp #include <stdarg.h> int sum_i(int amount, ...) { int i = 0; int val = 0; int sum = 0; va_list vl; va_start(vl, amount); for (i = 0; i < amount; i++) { val = va_arg(vl, int); sum += val; } va_end(vl);
2013 Oct 03
1
[LLVMdev] Help with a Microblaze code generation problem.
Sorry if this is a duplicate: I tried to send it last night and it didn't go through. I'm trimming some text to see if it helps. I have a simple program that fails on the Microblaze: int main() { unsigned long long x, y; x = 100; y = 0x8000000000000000ULL; return !(x > y); } As you can see, the test case compares two unsigned long long values. To try to track
2007 Mar 01
4
How to read in this data format?
Hi, I recieved an ascii file, containing following information: $$ Experiment Number: $$ Associated Data: FUNCTION 1 Scan 1 Retention Time 0.017 399.8112 184 399.8742 0 399.9372 152 .... Scan 2 Retention Time 0.021 399.8112 181 399.8742 1 399.9372 153 ..... I would like to import this data in R into a dataframe, where there is a column time, the first numbers as column names, and the
2018 Sep 28
3
error: expected memory with 32-bit signed offset
Hi, I want to encode Loongson ISA initially https://gist.github.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But 
2006 Jun 26
2
[klibc 28/43] mips support for klibc
The parts of klibc specific to the mips architecture. Signed-off-by: H. Peter Anvin <hpa at zytor.com> --- commit 8dc79563c06020d8844b9e9b821741828039b59e tree b957c8fb1fddf486f5c26b1880726051d4f6aaad parent bc9b363b31d301ab94c115cccc2e079c0d318498 author H. Peter Anvin <hpa at zytor.com> Sun, 25 Jun 2006 16:58:31 -0700 committer H. Peter Anvin <hpa at zytor.com> Sun, 25 Jun
2004 Aug 06
1
status report on the Windows CE (PocketPC) ACM codec
> > It was essentially my own mistake. After the Embedded C++ IDE crashed unexpectedly, > the .lib file was no longer present in the project settings (the project had not been saved) > so all the errors I got were caused by a missing .lib reference in the link stage! > I had to change my cross compiler target to "arm-wince-pe" because otherwise the > object/.lib files
2012 Dec 28
1
[LLVMdev] [PATCH] LLVM build failure on OpenBSD/mips64
I'm just passing this patch on to the list as I know Brian is busy and I had proded him to file the bug report. http://llvm.org/bugs/show_bug.cgi?id=14721 "binutils on OpenBSD is quite old, which causes the build on mips64el to fail on MipsJITInfo.cpp - it complains of illegal operands. The attachment patches it so that it will build. All the patch does is replace the register aliases
2012 Oct 17
0
[LLVMdev] Hexagon Assembly parser question
On Oct 17, 2012, at 3:29 PM, David Young <davidy at codeaurora.org> wrote: > Hi, > I’m trying to enable the hexagon LLVM assembly parser. It seem like there is a lot of work that has been done to make this parsing straightforward. > > But…. > Hexagon assembly does not follow the “Mnemonic Rx Rx …” format that is expected by the assembly parsing infrastructure,