similar to: [LLVMdev] instructions requiring specific physical registers for operands

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] instructions requiring specific physical registers for operands"

2012 May 09
0
[LLVMdev] instructions requiring specific physical registers for operands
Hello Jonas, > I wonder, what would be the best solution for instructions that require > operands in a particular register, and even gives the result in a particular > register? You need to custom select such instruction. See e.g. div / idiv on x86 as an example. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
2012 May 09
2
[LLVMdev] instructions requiring specific physical registers for operands
On May 9, 2012, at 4:27 AM, Anton Korobeynikov wrote: > Hello Jonas, > >> I wonder, what would be the best solution for instructions that require >> operands in a particular register, and even gives the result in a particular >> register? > You need to custom select such instruction. See e.g. div / idiv on x86 > as an example. That's often easiest, yes;
2012 May 09
0
[LLVMdev] instructions requiring specific physical registers for operands
Jim, > The an instruction that uses R0 and R1 as fixed input registers and R2 for output could define itself using those register classs: > def myInst : baseclass<…, (outs GPRr2:$dst), (ins GPRr0:$src1, GPRr1:$src2), …> > Use those reg classes in pattern to match also, and things should just work. The register allocator can take care of any reg-to-reg copies that are required. As
2014 Jan 11
3
[LLVMdev] Possible error in docs.
http://llvm.org/docs/CodeGenerator.html#machine-code-description-classes Section starting: Fixed (preassigned) registers It talks about converting: define i32 @test(i32 %X, i32 %Y) { %Z = udiv i32 %X, %Y ret i32 %Z } into ;; X is in EAX, Y is in ECX mov %EAX, %EDX sar %EDX, 31 idiv %ECX ret BUT, where does the "sar" come from? Kind Regards James
2007 Jan 26
7
How to protect attributes from being updated?
Hi! I''m new to Rails! Rails rox! 1 quesion so far: I have :email attribute in User model. I dont'' want :email to allow to be updated. How do i do this with Rails? Do I have to implement required validation manually? Thanks! --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "Ruby on Rails:
2008 Jul 23
5
Histogram
Hi, how can I treat data organised in classes and frequencies? Ex. class frequency 20-23 9 23-25 7 26-28 5 29-31 5 32-34 3 Thanks Angelo Scozzarella
2018 Feb 12
2
[parallel] fixes load balancing of parLapplyLB
Dear R-Devel List, **TL;DR:** The function **parLapplyLB** of the parallel package has [reportedly][1] (see also attached RRD output) not been doing its job, i.e. not actually balancing the load. My colleague Dirk Sarpe and I found the cause of the problem and we also have a patch to fix it (attached). A similar fix has also been provided [here][2]. [1]:
2018 Feb 26
2
[parallel] fixes load balancing of parLapplyLB
Dear Christian and Henrik, thank you for spotting the problem and suggestions for a fix. We'll probably add a chunk.size argument to parLapplyLB and parLapply to follow OpenMP terminology, which has already been an inspiration for the present code (parLapply already implements static scheduling via internal function staticClusterApply, yet with a fixed chunk size; parLapplyLB already
2012 Jun 18
2
[LLVMdev] Best way to replace LLVM IR operation with code containing control flow?
Hi, -Does anyone know where a backend-specific optimization can be added to replace an instruction with code containing control flow? I'm interested in adding an optimization for the DIV instruction (x86-atom) which replace the IDIV/DIV with code containing control flow to select between the intended IDIV/DIV and an 8-bit DIV with movzx, as described in the Intel Atom Optimization Guide. My
2019 Jun 15
3
Constrained integer DIV (WAS: Re: Planned change to IR semantics: constant expressions never have undefined behavior)
> -----Original Message----- > From: Cameron McInally <cameron.mcinally at nyu.edu> > Sent: Friday, June 14, 2019 4:02 PM > To: Eli Friedman <efriedma at quicinc.com>; LLVM Developers Mailing List <llvm- > dev at lists.llvm.org> > Cc: Craig Topper <craig.topper at gmail.com>; Kaylor, Andrew > <andrew.kaylor at intel.com> > Subject: [EXT]
2018 Feb 19
2
[parallel] fixes load balancing of parLapplyLB
Hi, I'm trying to understand the rationale for your proposed amount of splitting and more precisely why that one is THE one. If I put labels on your example numbers in one of your previous post: nbrOfElements <- 97 nbrOfWorkers <- 5 With these, there are two extremes in how you can split up the processing in chunks such that all workers are utilized: (A) Each worker, called
2013 Apr 05
3
[LLVMdev] Integer divide by zero
Hey guys, I'm learning that LLVM does not preserve faults during constant folding. I realize that this is an architecture dependent problem, but I'm not sure if it's safe to constant fold away a fault on x86-64. A little testcase: #include <stdio.h> int foo(int j, int d) { return j / d ; } int bar (int k, int d) { return foo(k + 1, d); } int main( void ) { int r =
2007 Jun 06
4
how hierarchical is HTB?
Hi there! I''ve using HTB for a while and now I an faced with a ''problem''. How hierarchical is HTB? Let''s say I have this 3 layer HTB setup: root class 1: (rate=100, ceil=100) 1: children classes 1:10 (30,100) and 1:20 (70,100) 1:10 children classes 1:100 (10,100) and 1:101 (20,100) 1:20 children classes 1:200 (30,100) and 1:201 (70,100) I managed to have
2009 Apr 02
2
[LLVMdev] JIT compilation and debuggen
Hello everyone, I have recently discovered the LLVM project and have to say that it looks impressively interesting so far. Kudos to all developers for the good work. However, I am afraid I have a few newbie questions that I have been unable to resolve browsing the documentation. I am evaluating the use of LLVM with respect to a feasibility study for a project. For this project I need to be
2013 Apr 05
0
[LLVMdev] Integer divide by zero
On 4/5/2013 1:23 PM, Cameron McInally wrote: > Hey guys, > > I'm learning that LLVM does not preserve faults during constant > folding. I realize that this is an architecture dependent problem, but > I'm not sure if it's safe to constant fold away a fault on x86-64. > > A little testcase: > > #include <stdio.h> > > int foo(int j, int d) { >
2012 Jun 19
0
[LLVMdev] Best way to replace LLVM IR operation with code containing control flow?
Hi Tyler, > -Does anyone know where a backend-specific optimization can be added to replace > an instruction with code containing control flow? I think the backend lowering of atomic intrinsics generates control flow (loops), so that may give you a clue. Ciao, Duncan.
2012 Mar 27
1
[LLVMdev] Compiling integer mod
For the simple C program below I show the output of clang and the output of the VS compiler (I am on windows). Maybe this is obvious to you, but is it really faster to do 2 multiplications, 3 movl instructions, 2 shifts, 1 add, and 1 substract than to do 1 mov, 1 cdq, and 1 idiv? I run into this while trying to understand why my code runs slower with llvm than a comparable program on windows.
2005 Jan 20
5
glm and percentage data with many zero values
Dear all, I am interested in correctly testing effects of continuous environmental variables and ordered factors on bacterial abundance. Bacterial abundance is derived from counts and expressed as percentage. My problem is that the abundance data contain many zero values: Bacteria <-
2013 Apr 05
4
[LLVMdev] Integer divide by zero
On Fri, Apr 5, 2013 at 2:40 PM, Joshua Cranmer 🐧 <Pidgeot18 at gmail.com>wrote: ... > Per C and C++, integer division by 0 is undefined. That means, if it > happens, the compiler is free to do whatever it wants. It is perfectly > legal for LLVM to define r to be, say, 42 in this code; it is not required > to preserve the fact that the idiv instruction on x86 and x86-64 will
2002 Apr 03
1
Fwd: Re: "weight" parameter in htb?
---------- Forwarded Message ---------- Subject: Re: [LARTC] "weight" parameter in htb? Date: Wed, 3 Apr 2002 10:54:01 +0530 From: Shekhar Joshi <shekhar@disha.co.in> To: lartc@mailman.ds9a.nl On Tuesday 02 April 2002 07:32 pm, you wrote: > On Tue, Apr 02, 2002 at 03:34:08PM +0200, Martin Devera wrote: > > > E.g. you might have a customer agency which needs say 256