similar to: [LLVMdev] Question about PTXFrameLowering

On Mon, Apr 16, 2012 at 3:48 AM, Lei Mou <lei.mou.uu at gmail.com> wrote: > Hi all, > > I'm learning the PTX backend and confused by the following problem. In the > constructor of PTXFrameLowering, StackAlignment and LocalAreaOffset are > assigned 2 and -2, respectively. Since PTX has neither stack frame nor > stack pointer, why StackAlignment and LocalAreaOffset are

Hi, Our target only has native support for i32 and f32 types. For data types smaller than these, I have to custom lowering truncating store using two atomic load instruction (which have the same semantics as ISD::ATOMIC_LOAD_AND and ATOMIC_LOAD_OR, respectively). I run into a problem during the legalization process, where the legalizer complains that ISD::STORE and ISD::ATOMIC_LOAD_OR (generated

Hi Lei, Le 31/05/2012 03:44, Lei Mou a écrit : > Problem solved by returning the second result of the ATOMIC_LOAD_OR node... You got the chain instead of the loaded value. IMHO, a better solution would have been to add a Pat<> rule to match truncstores and expand them into target store/load/and/or. Pat : <(truncstore16 GPR:$val, MEM:$mem), (store MEM:$mem, (or

Problem solved by returning the second result of the ATOMIC_LOAD_OR node... On Wed, May 30, 2012 at 9:38 PM, Lei Mou <lei.mou.uu at gmail.com> wrote: > Hi, > > Our target only has native support for i32 and f32 types. For data > types smaller than these, I have to custom lowering truncating store > using two atomic load instruction (which have the same semantics as >

Hi all, In our architecture, there is a set of general purpose registers which could be used to store integer and floating point numbers. My problem is how to correctly specify the type of this register class. For now, its type is specified as i32, and it is problematic if it is used in floating point instructions, since tablegen cannot correctly infer the type information of such a pattern. Here

Hi, I'm writing to ask the differences between a "reserved" register and an "unallocable" register. In X86 backend, for example, the stack pointer register and instruction pointer are reserved but allocatable. In the Doxygen document of function llvm::TargetRegisterInfo::getReservedRegs, it says that a reserved register is one that *has particular uses and should be

On Thu, May 24, 2012 at 10:25:36PM +0800, Lei Mou wrote: > Hi all, > > In our architecture, there is a set of general purpose registers which could be > used to store integer and floating point numbers. My problem is how to correctly > specify the type of this register class. For now, its type is > specified as i32, and > it is problematic if it is used in floating point

On Apr 17, 2012, at 9:09 PM, Lei Mou wrote: > I'm writing to ask the differences between a "reserved" register and an "unallocable" register. In X86 backend, for example, the stack pointer register and instruction pointer are reserved but allocatable. In the Doxygen document of function llvm::TargetRegisterInfo::getReservedRegs, it says that a reserved register is one

The following problems happens with architectures, where stack alignment is smaller than the biggest preferred alignment for any data type SP pointer may point anywhere with alignment of stack alignment (4 in our case) SelectionDAGBuilder however calls CreateStackObject with preferred alignment is given data type(8 in our problemaric case. The ABI alignment for this data type is only 4) This

> When enabling and compiling this with mingw on Win32, my debugger > complains about heap overruns when calling speex_encoder_destroy(). This > could be a mingw issue though, as I also found a stackalignment bug which > prevents me from _USING_SSE (apparantly -mpreferred-stack-size is just > "prefered" and therefore ignored... *Sigh*). Just so I understand, the

On Tue, Oct 23, 2012 at 12:56 PM, Eric Christopher <echristo at gmail.com>wrote: > > Thanks for replying so quickly. Would you elaborate on this further? > > > > It seems costly to change the default stack alignment on the platform, > since > > that would require recompiling all of the system and user libraries to > also > > adhere to 32-byte stack

ola, ive been looking at adding support for an -msave-args option for use on x86_64. the short explanation of it is that it makes x86_64 function prologues store their register arguments on the stack. the purpose of this is to make the arguments trivially accessible for things like stack traces with arguments. as per https://blogs.oracle.com/sherrym/entry/obtaining_function_arguments_on_amd64,

Hi everyone, For those who like to play with experimental stuff, I've got something new to test. If you compile with --enable-vorbis-psy , Speex uses a variant of the Vorbis psycho-acoustic model to shape the coding noise. So far, I've obtained a slight increase in quality, but I'm interested in feedback from others. This still needs a lot of tuning and has received only a minimal

Time stamps are correct and my system time is correct. I am now tried to use Sys.setFileTime() to update time stamps as proposed. This does not help. The windows and debian builds give different reports on the time stamp issue. https://win-builder.r-project.org/incoming_pretest/eurostat_3.2.8_20180920_122655/Windows/00check.log

Dear developers, Upon CRAN submission I have bumped into "future file timestamps" warning that I can't solve. I have updated the package as usual, and all checks go through in my system. CRAN reports the following warning however. * checking for future file timestanps ... WARNING Files with future time stamps: DESCRIPTION NAMESPACE README.md The build log is at

Could someone explain to a non-US dummy the following phrases I have seen on the list. "I can provide you with tier 1 termination 6/6. I can blend or NPANXX breakout." "We provide US48 termination, blended rate for 1 MOU and above is .008 with 6/6." What is 6/6? What is US48? What is blended? What is MOU? What is NPANXX breakout? -------------- next part --------------

I am trying to finalize the use of rsync for updatiung a new nfs server before we take the old one offline. I keep getting the following warning during the rsync process: Warning: unexpected rad size of 0 in map_ptr Any ideas where this comes from and how to make it go away? I am using rsync 2.5.2 on Solaris 8 to pull data from rsync 2.5.2 on Solaris 7. Bob roconnor@vectorpartners.com

Hi experts, I boot the xen4.0.0 with gpxe and boot xen 32 bit works well but when I try boot xen 64 bit, the error happens (XEN)Brought up 16 cpus (XEN) *** LOADING DOMAIN 0 *** (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) crc error (XEN) **************************************** Can you give me a light? Thanks Lei -- "We learn from failure, not from

Hi experts, I boot the xen4.0.0 with gpxe and boot xen 32 bit works well but when I try boot xen 64 bit, the error happens (XEN)Brought up 16 cpus (XEN) *** LOADING DOMAIN 0 *** (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) crc error (XEN) **************************************** Can you give me a light? Thanks Lei -- "We learn from failure, not from

Hi all If I use nfsroot boot the xen dom0, I find it works well if not use initrd-2.6.32.9.img. what does "initrd-2.6.32.9.img" contains? Thanks Lei -- "We learn from failure, not from success!" _______________________________________________ Xen-users mailing list Xen-users@lists.xensource.com http://lists.xensource.com/xen-users