similar to: [LLVMdev] [cfe-dev] Compiling Multiple Files

Hi Ryan, > Do you know if it's possible to inline functions without an external node? Sorry, I don't know to what you're referring here. Could you please rephrase? what do you mean be "external node"? Cheers, James ________________________________________ From: Ryan Taylor [ryta1203 at gmail.com] Sent: 12 March 2012 17:58 To: James Molloy Cc: llvmdev at cs.uiuc.edu

James, Sure. I want to inline functions in a C program that has no external node, or "main". So the "top" function is not main and there does not exist a main in the file. Thanks. On Mon, Mar 12, 2012 at 11:23 AM, James Molloy <James.Molloy at arm.com> wrote: > Hi Ryan, > > > Do you know if it's possible to inline functions without an external >

James, Thanks. It wouldn't take the LTO option; however, I can get it to inline using -cppgen=inline. However, when I run clang the second time it gives me an error, stating that it expects a top level entity. I think I've run into this issue before. Any ideas? On Mon, Mar 12, 2012 at 11:30 AM, James Molloy <James.Molloy at arm.com> wrote: > Hi Ryan, > > I see. Well,

Hi Ryan, I see. Well, that shouldn't be an issue. If you link the bitcode files together with llvm-link you can then do several things: (1) Run clang on it as you normally would with -O3 for maximum inlining (2) Run 'llc' manually with -O3 and LTO, which will do the maximum link time optimisations. (3) Run 'opt' manually with -O3, LTO which will produce another bitcode file,

Thanks for the replies guys but I think I should have phrased my question better... looking at the Mips backend there are machine instructions that operate on signed and unsigned data, such as add and addu. And like Mips, I need to specify unsigned specific instructions, so how do these get chosen between if the LLVM IR does not carry type data? A very general point in the right direction is all i

how does llvm decide when to use unsigned instructions then? such as unsigned adds and loads? I'm trying to describe some multiply shift ops and getting a bit stuck differentiating between signed and unsigned. sam Eli Friedman-2 wrote: > > On Wed, Feb 22, 2012 at 4:28 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > On Wed, Feb 22, 2012 at 4:28 PM, Ryan Taylor <ryta1203

Does a transform exist to breakdown the GEP? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111206/e88dddfe/attachment.html>

Hi Sam, Whereas most languages track signedness on the variable/value level, LLVM IR takes a more machine-like approach of having the sign apply to the instruction rather than the value. It is therefore the frontend (or whatever is initially producing the LLVM IR) that should know whether an operation should be signed or unsigned. Hopefully that makes sense, Cheers, James -----Original

It looks like this problem only exists on nested loops, ideas? On Thu, Jan 12, 2012 at 11:44 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > Is it not a good idea to try and extract loops that have multiple exits? > > > On Thu, Jan 12, 2012 at 10:44 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > >> I am trying to use ExtractLoop() but I am getting segFaults:

ulimit -s = 8192 set "ulimit -c unlimited" On Tue, Sep 11, 2012 at 3:03 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > John, > > Thanks for responding. No, I don't see a limit from ulimit. It's > definitely with the tblgen though, I have the same errors trying to compile > clang. > > > On Tue, Sep 11, 2012 at 2:57 PM, John Criswell

---------- Forwarded message ---------- From: Ryan Taylor <ryta1203 at gmail.com> Date: Thu, Dec 8, 2011 at 11:13 AM Subject: Re: [LLVMdev] GetElementPtr To: Reid Kleckner <reid.kleckner at gmail.com> There is no support for gep, it's my understanding that it's target-independent, so there's no reason to put the lowering in the target lowering portion is there?

I've tried all the types (both for result and Intrinsic ID), can't seem to find what cast is causing the issue here. On Fri, Jun 24, 2016 at 11:47 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > That's what I thought but I got the same error with: > > DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, > DAG.getTargetConstant(Intrinsic::my_intrinsic, DL, MVT::i16), LHS);

---------- Forwarded message ---------- From: Ryan Taylor <ryta1203 at gmail.com> Date: Mon, Dec 12, 2011 at 4:58 PM Subject: Re: [LLVMdev] GetElementPtr To: Eli Friedman <eli.friedman at gmail.com> Sorry, So what I'm trying to ask is are the widths given (32, 64) for the index and the offset the widths of the index and offset values or the width of the type they are

Usually it is the ones that end in ".inc". From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Ryan Taylor Sent: Tuesday, September 11, 2012 3:12 PM To: John Criswell Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Fwd: Build Error from Intrinsics.td What files are created by the TableGen so that I can clean them out and start fresh? On Tue, Sep

Hi Ryan, > On Aug 24, 2015, at 6:49 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > Quentin, > > I apologize for the spamming here but in getVR (where VReg is assigned an RC), it calls: > > const TargetRegisterClass *RC = TLI->getRegClassFor(Op.getSimpleValueType()); > VReg = MRI->createVirtualRegister(RC); > > My question is why is it using the

Hi Sam, I am not a MIPS expert by any means, so YMMV, but: MIPS addu only differs to "add" in its (non)setting of the overflow flag. Because LLVM doesn't provide a way via the IR to access the overflow flag, a special notation isn't required in the IR to distinguish the two operations. Do you have another example? Cheers, James -----Original Message----- From:

The diff is not only the && and || but also the leading !: diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 58f029fbe9fc..7ee06fc153b2 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -659,7 +659,7 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {

Hi, It's changed a few times over the last year. I believe xdg-open spawns whichever application your desktop environment would use to open the file so you should be able to tell it to use dotty. From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Ryan Taylor via llvm-dev Sent: 11 August 2015 00:30 To: llvm-dev at lists.llvm.org Subject: [llvm-dev] Fwd: [LLVMdev]

AddRegisterOperand calls getVR and yes, I think an IMPLICIT_DEF is being generated. On Tue, Aug 25, 2015 at 2:40 PM, Quentin Colombet <qcolombet at apple.com> wrote: > > On Aug 25, 2015, at 11:05 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > I have not tried 3.5, it's a significant amount of work to port from one > version to the next though, I did not

By LLVM do you mean the backend? I'm not using the backend, so is that i32 on the 0 index the type of the index value or the type of the value to which exists at that index? it seems the pointer itself has no width, it's arbitrary and is handled in the lowering and is target dependent on the bus width. Basically, when I am computing offset I need to know the sizes for add. The size of