similar to: [LLVMdev] Problem with x86 32-bit debug information ?

Hi all, I'm using trunk version of LLVM/CLANG. When I compile attached files on my 64-bit Ubuntu 10.04 LTS system as follows: clang -O2 -g check.c main.c -o check64 When I do gdb check64 and set a breakpoint to the check routine and executes to the breakpoint, I've got: Breakpoint 1, check (result=0x601110, expect=0x601020, n=53) at check.c:7 7 { As you can see I can inspect

Hi James, I fully agree with you and understand your statement about -O2. Now some questions for you: Did you try to reproduce experiments described in my previous e-mail ? Did you look at debug informations generated for 'n' parameter on x86 32-bit & x86 64-bit ? I'm working on my own front-end for LLVM and I had difficulties with debug information when they are related to x86

On Wed, Mar 7, 2012 at 6:50 AM, Seb <babslachem at gmail.com> wrote: > Hi James, > > I fully agree with you and understand your statement about -O2. > > Now some questions for you: > Did you try to reproduce experiments described in my previous e-mail ? > Did you look at debug informations generated for 'n' parameter on x86 32-bit > & x86 64-bit ? >

Hi Pogo & James, Pogo, that is exactly the kind of answer I was expecting. Thanks for the time you spend on this problem. I myself did also some experimenst and found way to get what I'm expecting but I think that at least for x86 or any parameter passed on the stack for a different architecture the way LLVM handle debug information might be a problem. So here was the situation: My

Hi James, Thanks for the answer, for Cortex-A9 would you recommend to generate thumb2 code or ARM code ? What would be the best performance wise ? Best Regards Seb > -----Original Message----- > From: James Molloy [mailto:james.molloy at arm.com] > Sent: Thursday, May 31, 2012 9:57 AM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] llc support

Hi James, Thanks for the answer, can you elaborate on difference between thumb, thumb2, ARM, thumbv7. I'm a bit lost right now. When specifying thumbv7 llc will generate thumb only code, not thumb2 ? Best Regards Seb > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of James Molloy > Sent: Tuesday, May 29,

Hi Seb, The ARM instruction set is a fixed-width 32-bit instruction set that has been around since the early days of ARM. Modern (armv4t onwards) cores mostly have another instruction set that can be used in tandem, the "thumb" instruction set. This is a variable width (16 or 32 bit) instruction set that provides a subset of the ARM instruction set and was intended to provide the

On 29/05/12 15:39, Sebastien DELDON-GNB wrote: > Hi all, > > I was wondering if 'llc' is able to generate 'it' instruction for ARM Cortex-A9 target ? > > Thanks for your answers > Seb > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu >

Hi all, I was wondering if 'llc' is able to generate 'it' instruction for ARM Cortex-A9 target ? Thanks for your answers Seb

Function.cpp:167: error: call of overloaded `AddInteger(uint32_t&)' is ambiguous /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:151: note: candidates are: void llv m::FoldingSetImpl::NodeID::AddInteger(int) /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:152: note: void llvm::FoldingSetIm pl::NodeID::AddInteger(unsigned int) /home/Seb/llvm/include/llvm/ADT/FoldingSet.h:153: note: void

Hi Seb, > Already done here : http://llvm.org/bugs/show_bug.cgi?id=12130 that doesn't describe the original issue (second store removed), it is talking about a different issue that appeared at -O1 (and it first seemed to explain your original problem; but now I think the -O1 transform was correct and does not explain your original problem). Ciao, Duncan. > > Thanks for your

Hi all, Following command was working for me before: svn co http://llvm.org/svn/llvm-project/llvm/trunk llvm Now it fails as follows: svn: Server sent unexpected return value (500 Internal Server Error) in response to OPTIONS request for 'http://llvm.org/svn/llvm-project/llvm/trunk ' Any idea ? Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed...

On Mar 6, 2012, at 5:31 AM, Seb <babslachem at gmail.com> wrote: > Hi all, > > Anyone have ideas/info on this topic ? > Thanks > Seb > > 2012/3/2 Seb <babslachem at gmail.com> > Hi all, > > I'm using my own front-end to generate following code .ll file targeting x86 32-bit: > > ; ModuleID = 'check.c' > target datalayout =

Crossbow team, The following is of interest to the Crossbow project. Since a large chunk of these changes also exist in the Crossbow gate, the delivery of this wad will result in fewer lines of changes for Crossbow''s delivery. If someone on Crossbow could participate in this review, that would be a bonus (Eric Cheng made original changes in the Crossbow gate at some point last year).

I tried bu clang seems to support only target on which it has been compiled. If I use: with clang -S -emit-llvm t.c -o t.ll I've got following file for t.ll ; ModuleID = 't.c' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple =

Already done here : http://llvm.org/bugs/show_bug.cgi?id=12130 Thanks for your answers Best Regards Seb 2012/2/29 Duncan Sands <baldrick at free.fr> > Hi Seb, > > > If I remove datalayout definition, code is not optimized and work as >> expected. >> So my question is: >> >> What attribute/value/interpretation of data-layout would cause this type

Hi Seb, > If I remove datalayout definition, code is not optimized and work as expected. > So my question is: > > What attribute/value/interpretation of data-layout would cause this type of bug? all kinds of optimizers use datalayout (and are disabled if there is none). For example, alias analysis, anything that needs to understand getelementptr offsets, the list is endless. I

Hi Devang, Not only "vtable ptr" is a problem, for this field it seems that CLANG emits a NULL metadata node which is translated into 'i32 0'. The other problem is for 'isArtificial' field with is described as being of type i1 and CLANG emits i32. Looking at sources, it seems that it should be a i32 flag field. Hope this helps, Best Regards Seb 2011/12/15 Devang

You can compile an empty C source code with clang -S -emit-llvm and copy the data layout from there. 2011/10/27 Seb <babslachem at gmail.com> > Hi all, > > Can someone give me advice on what should be a good definition of target > datalayout for an ARM cortex-A9 + neon target and x86 32-bit ? > Shall I use a different definition for a cortex-A9 without neon ? > Thanks for

On Nov 7, 2011, at 1:04 AM, Seb wrote: > Hi all, > > I was wondering how I can get a list of ARM NEON intrinsics supported by LLVM. Is there any documentation about them or IntrinsicARM.td file is the only resource I can use ? LLVM implements the standard set of intrinsics defined by ARM. You can find them listed in ARM's documentation. See Appendix E of the RealView® Compilation