similar to: [LLVMdev] SwitchInst handling in backend

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] SwitchInst handling in backend"

2012 Feb 27
2
[LLVMdev] SwitchInst handling in backend
Hi Eli, Thank you for the quick reply. On Feb 27, 2012, at 10:03 PM, Eli Friedman wrote: > SelectionDAGBuilder::visitSwitch is the general switch lowering... I understand this lowering is target independent and there is no additional target dependent handling of switch instructions - right? Only branches and jump tables are left after this lowering? Kind regards, Nico
2012 Feb 27
0
[LLVMdev] SwitchInst handling in backend
On Mon, Feb 27, 2012 at 12:52 PM, Nico <listiges at arcor.de> wrote: > Hi, > > if I want to know how switch instructions are handled in the backend, where do I have to look first? > I'm not familiar with the backend framework and I couldn't figure out the interface between the LLVM instruction 'SwitchInst' and whatever there is in the backend. > > I would be
2013 May 06
2
[LLVMdev] convert switch stmts to If statements
Hi All, Is there a pass in llvm that converts switch statements to if statements? George -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130506/f06741c4/attachment.html>
2013 May 06
2
[LLVMdev] convert switch stmts to If statements
I mean an llvm Pass that transforms switch statements into if statements. For example, if I have code with switch statements then running the pass will convert all switches to ifs in the bytecode. George On Mon, May 6, 2013 at 4:20 PM, Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- > > From: "George Baah" <georgebaah at gmail.com> > >
2015 Jul 24
2
[LLVMdev] Transforming SwitchInst to BranchInst
Hi, Are there some built-in LLVM transformation pass, or written library code that transforms LLVM::SwitchInst into if-condition statements (LLVM:: BranchInst)? The purpose of the transformation is that we have a legacy program analyzer that includes an LLVM pass manipulating if-condition statements. Statements of LLVM::SwithchInst should have been handled in the same manner but was not done.
2014 Oct 27
4
[LLVMdev] Switch instruction lowering
Hi, I'm interested in any information about implementations of switch instruction and its runtime cost. If it's very target dependent, I'm mostly care about X86. Pointing some LLVM code is also good. - Paweł -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20141027/285f02e5/attachment.html>
2013 May 06
0
[LLVMdev] convert switch stmts to If statements
----- Original Message ----- > From: "George Baah" <georgebaah at gmail.com> > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Sent: Monday, May 6, 2013 3:09:33 PM > Subject: [LLVMdev] convert switch stmts to If statements > > > > > Hi All, Is there a pass in llvm that converts switch statements to if > statements?
2011 Jul 31
3
[LLVMdev] SwitchInst::addCase with BlockAddress
I'm trying to figure out how to feed a blockaddress to a switch condition AND destination (basically emulating an indirectbr via a switch; I know it's not a good approach, I'm just experimenting). Suppose I have the following: SwitchInst *s = SwitchInst::Create(...); BasicBlock *bb = ...; PtrToIntInst k = new PtrToIntInst(BlockAddress::get(bb), <TYPE>, "", s);
2013 May 06
0
[LLVMdev] convert switch stmts to If statements
There is also the LowerSwitch pass that converts switch instructions to a sequence of branches. On May 6, 2013, at 1:24 PM, George Baah <georgebaah at gmail.com> wrote: > I mean an llvm Pass that transforms switch statements into if statements. For example, if I have code with switch statements then running the pass will convert all switches to ifs in the bytecode. > > George
2011 Aug 01
0
[LLVMdev] SwitchInst::addCase with BlockAddress
On Sun, Jul 31, 2011 at 7:36 AM, Carlo Alberto Ferraris <cafxx at strayorange.com> wrote: > I'm trying to figure out how to feed a blockaddress to a switch condition > AND destination (basically emulating an indirectbr via a switch; I know it's > not a good approach, I'm just experimenting). > Suppose I have the following: > > SwitchInst *s =
2018 May 22
1
How jump-table representated in DAG
Hi, all I am interested in how jump-table representated in DAG. I find the method visitJumpTable will Emit JumpTable node in the current MBB. visitJumpTableHeader - This function emits necessary code to produce index in the JumpTable from switch case. but how switch case emits? I would like to make this clearly. Thanks, yaoxiao -------------- next part -------------- An HTML attachment
2011 Aug 01
1
[LLVMdev] SwitchInst::addCase with BlockAddress
Nella citazione lunedì 1 agosto 2011 08:13:12, Eli Friedman ha scritto: > On Sun, Jul 31, 2011 at 7:36 AM, Carlo Alberto Ferraris > <cafxx at strayorange.com> wrote: >> I'm trying to figure out how to feed a blockaddress to a switch condition >> AND destination (basically emulating an indirectbr via a switch; I know it's >> not a good approach, I'm just
2013 Aug 22
2
[LLVMdev] SwitchInst problem
Hi All, Value* V; Value* V2; BasicBlock * BB; unsigned j; ///number of cases .... //insert V , V2, j and BB SwitchInst* sw= builder.CreateSwitch(V, BB, j); ConstantInt * CI= dyn_cast<ConstantInt>(V2); sw-> addCase( CI , BB); At last step there is Program received signal SIGSEGV, Segmentation fault. What is wrong in the code? Thanks in advance -- * Rasha Salah Omar
2011 Nov 03
1
[LLVMdev] [LLVM] LoopUnswitch + SwitchInst
Hi all. By now loops with switch instruction are unswitched value-by-value. For example for case range [0..9] we need to run unswitch process 10 times! I want try to optimize that case. Is there any hidden problems that blocks this improvement? Regards, Stepan.
2013 Aug 22
0
[LLVMdev] SwitchInst problem
Hi Rasha, > What is wrong in the code? Your best bet is to run a debugger and see if the variables have values you expect just before that last call, and then look at what's causing the segfault in LLVM (null pointer?) code and work out where the first place it's not doing what you expect is. Cheers. Tim.
2012 Oct 12
2
[LLVMdev] initial selection DAG
Hi, I wonder how the initial selection DAG is built in the backends. >From working backends I get: ----8<------- Initial selection DAG: BB#0 'main:' SelectionDAG has 18 nodes: ----8<------- >From my (not working) backend I get: ----8<------- Initial selection DAG: BB#0 'main:' SelectionDAG has 15 nodes: ----8<------- I miss three nodes and I wonder what do I have
2012 Nov 29
2
[LLVMdev] [cfe-dev] UB in TypeLoc casting
Moving to LLVM dev to discuss the possibility of extending the cast infrastructure to handle this. On Tue, Nov 20, 2012 at 5:51 PM, John McCall <rjmccall at apple.com> wrote: > On Nov 18, 2012, at 5:05 PM, David Blaikie <dblaikie at gmail.com> wrote: >> TypeLoc casting looks bogus. >> >> TypeLoc derived types return true from classof when the dynamic type >>
2018 Jul 15
2
llvm pass is very slow
Hi I write a LLVM function pass. The pass will loop the basicblock in the function, check the instruction's type with dyn_cast<switchinst>, print the instruction and the basicblock's successors. I think it is not very complex. My bitcode file is about 30M. My CPU is i7-7700(3.6GHz). It has been running for 60 hours but it is still running. I am not sure whether this is a normal
2010 Oct 07
2
[LLVMdev] [Q] x86 peephole deficiency
Hi all, I am slowly working on a SwitchInst optimizer (http://llvm.org/PR8125) and now I am running into a deficiency of the x86 peephole optimizer (or jump-threader?). Here is what I get: andl $3, %edi je .LBB0_4 # BB#2: # %nz # in Loop: Header=BB0_1 Depth=1 cmpl $2, %edi
2016 Nov 15
2
In LLVM IR, how can I determine if a switch statement had an explicit default case?
Since a SwitchInst always has a default case even if no default case appeared in the code, what's the best way to determine if it's explicit or implicit? thanks.. don -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20161114/7b2965db/attachment.html>