similar to: [LLVMdev] LLVM Toronto social

Hopefully you mean sometime in the evening on 29th. If this is the case, count me in. Thanks 2012/2/21 Rafael Espíndola <rafael.espindola at gmail.com>: > On the last LLVM dev meeting I was surprised to find more llvmers that > work on the GTA. Maybe we could organize a small social meeting > similar to what happens in the bay area? > > I would propose scheduling the first

2012/2/24 Xin Tong <xerox.time.tech at gmail.com>: > Hopefully you mean sometime in the evening on 29th. If this is the > case, count me in. Good point, I forgot to select a time :-) What about 19:00? > Thanks Cheers, Rafael

It would be fun to meet some other LLVM developers in TO, 7:00 on wed at beer bistro should work for me. Andrew On 02/24/2012 05:22 PM, Rafael Espíndola wrote: > 2012/2/24 Xin Tong<xerox.time.tech at gmail.com>: >> Hopefully you mean sometime in the evening on 29th. If this is the >> case, count me in. > Good point, I forgot to select a time :-) > What about 19:00?

can we get a confirmation on who is coming tomorrow ? Thanks Xin 2012/2/24 Andrew Clinton <andrew at sidefx.com>: > It would be fun to meet some other LLVM developers in TO, 7:00 on wed at > beer bistro should work for me. > > Andrew > > > On 02/24/2012 05:22 PM, Rafael Espíndola wrote: >> >> 2012/2/24 Xin Tong<xerox.time.tech at gmail.com>:

Sorry for being late at organizing this one. Just remembered when I saw the email about the bay area one. Who would be able to go to the Beer Bistro this Thursday at 19:00? Cheers, Rafael

The next meeting is going to be Wednesday next week (9th) at 19:00. Lets try a somewhat quieter place this time: http://www.harbordhouse.ca. No web app for the GTA one, just reply to me if you are going :-) Cheers, Rafael

Hi, first of all, sorry for failing to keep a regular schedule. The next LLVM GTA social is going to be August 29. I think the Harbord House (http://www.harbordhouse.ca) is working fine, so if no one has a better suggestion lets meet there at 19:00. Just reply to me if you are going so that I know how many to book for. Cheers, Rafael

Hi everyone, It turns out that Wednesday would not work for me, so it would be great if we can change this to Tuesday (the 8th), the same time. I talked to Jeff and Rafael and they're both fine with that. Does this work for others who are interested in this as well? Cheers, -- Ehsan <http://ehsanakhgari.org/> On Tue, May 1, 2012 at 4:39 PM, Rafael Espíndola <rafael.espindola at

Sorry for being late at organizing this. The next meeting is going to be Wednesday next week (20th) at 19:00. The harbord house (http://www.harbordhouse.ca) worked fine, so I suggest we go there again. No web app for the GTA one, just reply to me if you are going :-) Cheers, Rafael

but does it have default values ? Thanks Xin On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote: > You specify shader model, bit size and etc. arch-specified parameters > though -march, -mattr and -mcpu, but AFAIK, PTX backend does not use > the GPU thread/block/grid size information in optimization yet. > > On Mon, Mar 12, 2012 at 8:17 PM, Xin

I do not know too much about clang, is opencl publicly supported in clang ? how about cuda ? Thanks Xin

On 7/19/12 1:23 PM, Jim Grosbach wrote: > Not really, no. If you really, really, wanted to do it, you could: 1) Hack the code generator to not use that register. It might be as simple as modifying the TableGen file to not know that the register exists. 2) Use inline asm to put the constant into that register and fetch it from that register. The real question is: what larger goal are you

I don't think so, but you should check source code. On Tue, Mar 13, 2012 at 9:58 PM, Xin Tong <xerox.time.tech at gmail.com> wrote: > but does it have default values ? > > Thanks > > Xin > > On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote: >> You specify shader model, bit size and etc. arch-specified parameters >>

I have a constant parameter in a LLVM function. Is there a way to reserve a CPU register such that it also holds the value of the parameter in LLVM x86 codegen ? Thanks Xin

Dear R users, I'm pleased to announce that the Greater Toronto Area (GTA) user's group is now active on meetup.com, and taking suggestions for the first meeting. If you are on the region, you can sign-up now at the link below http://www.meetup.com/Greater-Toronto-Area-GTA-R-Users-Group This group is aimed to bring together practitioners (from industry and academia alike) in order to

On Thu, Jul 19, 2012 at 2:28 PM, John Criswell <criswell at illinois.edu> wrote: > On 7/19/12 1:23 PM, Jim Grosbach wrote: >> >> Not really, no. > > > If you really, really, wanted to do it, you could: > > 1) Hack the code generator to not use that register. It might be as simple > as modifying the TableGen file to not know that the register exists. In fact

I am wondering that how does the LLVM PTX backend find out the constraints on executing GPU thread/block/grid size ( i.e. a block can at most have 1024 threads). Can anyone point me to the code ? I need information in the optimizer, how can I get it ? Thanks Xin

Is there any way to stop this ? /home/socrates/llvm/llvm-3.0.src/benchmarks/powerstone/crc/crc.c:67:1: error: 'main' must return 'int' void main() ^ 1 error generated. Thanks

Anyone in the Toronto area interested in getting together to share notes and swap war stories? -- Jim Van Meggelen jim@vanmeggelen.ca -- No virus found in this outgoing message. Checked by AVG Anti-Virus. Version: 7.0.300 / Virus Database: 265.6.9 - Release Date: 06/01/2005

I would like to generate a branch/jump to a native instruction address (set up in the JIT runtime) in LLVM IR. It seems all the branch instructions (except indirect branch) takes a LLVM BasicBlock. What would be the best way to achieve this ? Thanks Xin