similar to: [LLVMdev] ARM opcode format

Hi, I haven't been able to reproduce this problem on a smaller test and the original source code is from another virtual machine's IR. What I found out was that 42 << 7 is actually DPSoRegImmFrm, defined in ARMInstrFormats.td. This format is not dealt with in the ARMCodeEmitter.cpp and that's the problem I'm facing. The triple I'm using is

Hi Guillermo, I’m unable to reproduce the error you’re seeing with your bitcode input. “llc –mtriple armv7a-unknown-linux-gnueabi –O3” succeeds. What are you using to reproduce, and what version? Cheers, James From: Guillermo Perez [mailto:gaperez64 at gmail.com] Sent: 20 February 2012 11:32 To: James Molloy; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] ARM opcode format Hi, I haven't

Hi, I'm sorry I forgot to mention I am compiling the bitcode using the JIT. The actual error, I get when I'm trying to get the function to the pointer. I'm using a custom front end that translates Android's Dalvik bytecode into LLVM bitcode based on Android ICS's modified LLVM version. Thanks, On Mon, Feb 20, 2012 at 7:55 PM, James Molloy <James.Molloy at arm.com>

Hello, So the current JIT will be superseded by the MCJIT completely and no further development should be expected for the current JIT? In any case, I am definitely interested in submitting a patch if you could help me by sending me in the right direction, since I really want this working. I managed to reproduce this behavior in LLVM 3.0 by modifying llc to read my .bc file and try to JIT the

Guillermo, > I'm sorry I forgot to mention I am compiling the bitcode using the JIT. The > actual error, I get when I'm trying to get the function to the pointer. I'm > using a custom front end that translates Android's Dalvik bytecode into LLVM > bitcode based on Android ICS's modified LLVM version. ARM JIT is broken in many ways. So, what you're seeing is

Dear Tim, Thank you for your thorough reply. So, based on your reply I get every operand and check them to be (isDef && !isimplicit). Now my problem is that it gives me the physical register number.i.e, for example, instead of r0, it return %physreg66. Could you please help me on how to convert these physical register number to the ARM related register? I mean the 15 GPRs in ARM. Thank

Hi, I am experimenting with creating instructions that write into virtual registers that use the ARM GPRPair register class in Pre-RA phase. During register allocation, I hit an assertion because the code is not in SSA form: lib/CodeGen/MachineRegisterInfo.cpp:271: llvm::MachineInstr* llvm::MachineRegisterInfo::getVRegDef(unsigned int) const: Assertion `(I.atEnd() || llvm::next(I) ==

Hi Victor, Try this fix by Marina Yatsina: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120220/137532.html Nadav -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of lost Sent: Friday, March 02, 2012 22:53 To: NAKAMURA Takumi; LLVM Subject: Re: [LLVMdev] Access Violation using ExecutionEngine on 64-bit Windows 8

Hi, Takumi! I tried your patch, and it did not help. Moreover, I tried to compile under Windows 7 and copy files to Windows 8, and received the same exception. So the problem seems to be in Windows 8 itself or some non-portable code inside LLVM. Could anyone tell me what LLVM code in ExecutionEngine is responsible for allocating and protecting memory for generated native functions? Best

Hi Rotem, Thank to you, and especially to Marina! The problem gone. I'm a bit interested, what is the reason it worked in Win7, and not in Win8. I've recently used Process Explorer to discover, that the call was to ntdll.dll, which in Win8 is loaded to the totally different address. Best regards, Victor Milovanov Moscow State University graduate student 2012/3/3 Rotem, Nadav

Viktor, could you try my patch? I guess they are __chkstk. http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20120220/137577.html ...Takumi

Hi all, I'm trying to figure out a problem with relocation types 1 and 8 (as observed using otool -r on ARM/Thumb object files). Earlier, when I used LLVM 2.8 with llc to generate thumb (-march=thumb -mattr=+thumb2) assembly listings, then assemble those using the gcc of iPhone 4.2 SDK, there wasn't any problem. However starting with LLVM 2.9, the same toolchain emits slightly different

Hola, qué tal? Reenvío mi pregunta, por si no llegó... Gracias. Un saludo. --- El jue, 8/3/12, Ana Pérez V. <anapv78@yahoo.es> escribió: De: Ana Pérez V. <anapv78@yahoo.es> Asunto: Re: [R-es] Buscando la solución más eficiente para generar resultados a partir de un list Para: "Carlos J. Gil Bellosta" <cgb@datanalytics.com> CC: "r-help-es@r-project.org"

Using the latest version of syslinux/pxelinux.. When cold pxe booting a HP DL585 G2 (Broadcom NIC), if the pxemenu item is LOCALBOOT 0 and is selected, then a red screen with the following error occurs: Illegal OpCode EAX=000E09AC EBX=00000000 ECX=00000000 EDX=00000000 EBP=00004408 ESI=0000F000 EDI=000045E9 DS=F000 ES=0000 FS=0000 GS=0003 CS:EIP=1000:00000240

When running test 5 in Memtest86+ v1.65, I got a "this opcode is not supported", so I decided to add it. It''s a compare operation, and it''s just the opposite of the already supported one (opcode 0x39), so it''s nothing spectacular. Why there''s a page-fault when this instruction gets executed, I haven''t got a clue, but I have a feeling that

Hello, I have lots of the following entries in my log: nmbd[1605]: [2010/05/28 09:59:51, 0] nmbd/nmbd_packets.c:validate_nmb_packet(1375) nmbd[1605]: validate_nmb_packet: Bad REG/REFRESH Packet. validate_nmb_packet: Ignoring request packet with opcode 5. What does this mean exactly? Can I ignore this? I use samba (sernet-samba) 3.3.12-25 on Debian Lenny. Thanks and Regards. Henry

Hello, I have an issue with ebtables --arp-opcode and vlan support on the bridge. Ebtables support --arp-opcode witch is used for arp manipulation. ebtables -t nat -A PREROUTING -p arp --arp-opcode Request -j arpreply --arpreply-mac 10:11:12:13:14:15 --arpreply-target ACCEPT -i eth1 But it does not work when Ethernet frame comes tag with vlan pid. Can i overcome this limitation? Fanks

Currently the mmio_operands assumes writing to memory when operand 0 is register or immediate, this is false for cmp/test opcode. This patch resolve this problem, please review. Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Jun Nakajima <jun.nakajima@intel.com> Thanks Yunhong Jiang _______________________________________________ Xen-devel mailing list

Your message dated Sat, 10 Dec 2011 20:00:59 +0100 with message-id <20111210190059.GG15557 at wavehammer.waldi.eu.org> and subject line no bug has caused the Debian Bug report #649141, regarding xen-hypervisor-4.0-amd64: live migration fails with invalid opcode due to nonstop_tsc to be marked as done. This means that you claim that the problem has been dealt with. If this is not the case it

On Thu, Feb 13, 2014 at 2:15 AM, Kui Zhang <kuizhang at gmail.com> wrote: > Hello, > > When CONFIG_DRM_NOUVEAU=y, I get following error. Blank screen after initrd. > > This was in the dmesg. > > [ 0.282559] [drm] hdmi device not found 1 0 1 > [ 0.282688] nouveau [ DEVICE][0000:01:00.0] BOOT0 : 0x046800a3 > [ 0.282693] nouveau [ DEVICE][0000:01:00.0]