Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] shared bitcode modules / dynamic linking."
2012 Feb 26
0
[LLVMdev] shared bitcode modules / dynamic linking.
On Saturday 11 of February 2012 14:29:10 Paweł Sikora wrote:
> Hi,
>
> afaics in manuals the llvm-{link,ld} tools only can merge bitcode files
> into one bigger piece which looks like a static-linking from the c/c++ world.
> i'm wondering is it any possibility to link bitcode elements dynamically
> in the same way as e.g. c#/msil assemblies? static linking into one
2019 Feb 11
2
[cfe-dev] [8.0.0 Release] rc2 has been tagged
On Fri, Feb 8, 2019 at 9:53 AM Paweł Sikora via cfe-dev <
cfe-dev at lists.llvm.org> wrote:
> ----- Oryginalna wiadomość -----
> > Dear testers,
> >
> > 8.0.0-rc2 has been tagged from the release_80 branch at r353413.
>
> Hi,
>
> i've noticed a compile error with rc2 and libc++ (release_80 @svn). looks
> similar to
2019 Feb 07
9
[8.0.0 Release] rc2 has been tagged
Dear testers,
8.0.0-rc2 has been tagged from the release_80 branch at r353413.
Please run the test script, share your results, and upload binaries.
I'll get the source tarballs and docs published as soon as possible,
and binaries as they become available.
Thanks,
Hans
2007 Jan 26
2
strange behaviour with equality after simple subtraction
hello,
today while trying to extract data from a list for subsequent analysis, i
stumbled upon this funny behavior on my system:
> x<-c(0.1,0.9)
> 1-x[2]
[1] 0.1
> x[1]
[1] 0.1
> x[1]==1-x[2]
[1] FALSE
> x[1]>1-x[2]
[1] TRUE
> x<-c(0.3,0.7)
> x[1]
[1] 0.3
> x[2]
[1] 0.7
> 1-x[2]
[1] 0.3
> x[1]==1-x[2]
[1] FALSE
but:
>
2009 May 16
2
[LLVMdev] VMKit: msil optimization
Hello all.
is it possible to use LLVM to optimize existing .NET assemblies?
Basically doing the following:
- read in MSIL and convert into LLVM internal representation
- perform global optimizations on LLVM internal representation
- write out optimized MSIL using the existing LLVM backend
I presume that the capability to convert MSIL into LLVM internal
representation exists somewhere in VMKit.
2015 May 22
2
[LLVMdev] Problems with instruction scheduling
----- Original Message -----
> From: "Paweł Bylica" <chfast at gmail.com>
> To: "LLVMdev" <llvmdev at cs.uiuc.edu>
> Sent: Friday, May 22, 2015 8:45:11 AM
> Subject: Re: [LLVMdev] Problems with instruction scheduling
>
>
>
> Any comments?
Not in particular, but I think we're pretty close to applying a rewrite by Jonas Paulsson
2008 Oct 10
2
Another "I'm I right" question...
I''m pretty sure that there''s a better way to do this:
@roles = Role.find(:all)
@selected_role = Role.find(@user.role_id)
Can someone help me?
--~--~---------~--~----~------------~-------~--~----~
You received this message because you are subscribed to the Google Groups "Ruby on Rails: Talk" group.
To post to this group, send email to
2015 May 22
2
[LLVMdev] Problems with instruction scheduling
----- Original Message -----
> From: "Paweł Bylica" <chfast at gmail.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "LLVMdev" <llvmdev at cs.uiuc.edu>, "Jonas Paulsson" <jonas.paulsson at ericsson.com>
> Sent: Friday, May 22, 2015 9:19:14 AM
> Subject: Re: [LLVMdev] Problems with instruction scheduling
>
>
2016 May 12
2
Orc/MCJIT: Relocations vs pointers to functions
Thanks!
Currently using MCJIT. But migration to ORC is on my TODO list.
- Paweł
On Thu, May 12, 2016 at 8:30 PM Lang Hames <lhames at gmail.com> wrote:
> Hi Pawel,
>
> Option (1) and (3) are very similar, but using custom resolution (option
> 3) guarantees that JIT'd code can't accidentally end up depending on
> functions in your JIT that you didn't mean to
2016 Jun 20
2
Quality of LLVM headers
Joerg Sonnenberger via llvm-dev <llvm-dev at lists.llvm.org> writes:
> On Mon, Jun 20, 2016 at 05:05:18PM +0000, Paweł Bylica via llvm-dev wrote:
>> On Sun, Jun 19, 2016, 17:57 Joerg Sonnenberger <joerg at bec.de> wrote:
>>
>> > On Sun, Jun 19, 2016 at 03:24:22PM +0000, Paweł Bylica via llvm-dev wrote:
>> > > Hi LLVM,
>> > >
>>
2015 May 21
2
[LLVMdev] Problems with instruction scheduling
Hi,
I'm trying to fix PR23405 <https://llvm.org/bugs/show_bug.cgi?id=23405> -
assert failure during instruction scheduling in llc. I have related but
more generic questions.
Is there any higher level description of the algorithm used for instruction
scheduling in this case? It is new area for me and I would love to see
bigger picture.
My currently smallest test case contains 90 DAG
2009 May 16
0
[LLVMdev] VMKit: msil optimization
Dear Rudiger,
Rüdiger Klaehn wrote:
> Hello all.
>
> is it possible to use LLVM to optimize existing .NET assemblies?
>
It's in theory possible. LLVM+VMKit already does it for Java classes.
> Basically doing the following:
>
> - read in MSIL and convert into LLVM internal representation
> - perform global optimizations on LLVM internal representation
> - write
2015 Jul 21
2
[LLVMdev] Problem with InsertPointGuard ABI?
On Tue, Jul 21, 2015 at 5:55 PM Justin Bogner <mail at justinbogner.com> wrote:
> Paweł Bylica <chfast at gmail.com> writes:
> > I can confirm that the issue has been caused by NDEBUG flag.
> >
> > On Mon, Jul 13, 2015 at 6:29 PM Reid Kleckner <rnk at google.com> wrote:
> >
> > The layout of AssertingVH has depended on NDEBUG since 2009,
2014 Oct 27
4
[LLVMdev] Switch instruction lowering
Hi,
I'm interested in any information about implementations of switch
instruction and its runtime cost. If it's very target dependent, I'm mostly
care about X86. Pointing some LLVM code is also good.
- Paweł
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2016 Jun 20
2
Quality of LLVM headers
On Sun, Jun 19, 2016, 17:57 Joerg Sonnenberger <joerg at bec.de> wrote:
> On Sun, Jun 19, 2016 at 03:24:22PM +0000, Paweł Bylica via llvm-dev wrote:
> > Hi LLVM,
> >
> > I want to complain a bit about the quality of the code included in the
> > public LLVM headers. For projects that depend on LLVM is really hard to
> > just include LLVM headers not to
2017 Nov 20
4
Meaning of loads/stores marked both atomic and volatile
Hi llvm-dev,
I read about volatile and atomic modifiers in the docs[1], and I feel
they make sense to me individually.
However, I noticed that store[2] and load[3] instructions can be
marked as both volatile and atomic.
What's the use case for using both volatile and atomic on an
instruction? Isn't it the case that atomic implies volatile? I guess
it isn't, but I don't understand
2012 Aug 17
3
[LLVMdev] RFC: MCJIT enhancements
On Aug 17, 2012, at 2:50 AM, Paweł Bylica <pawel.bylica at ibs.org.pl> wrote:
> On Fri, Aug 17, 2012 at 12:16 AM, Kaylor, Andrew <andrew.kaylor at intel.com> wrote:
> Hi Paweł,
>
>
>
> Thanks for continuing this discussion.
>
>
>
> I like the simplicity of your suggestion. My only concern involves the ambiguity of what is meant by “environment”.
2016 May 06
2
Passing structs in C calling convention
Hi,
I want to declare a function that matches C ABI. Do I need to transform
declarations like void @f(%struct.A %a) into void @f(%struct.A* byval %a)
myself or LLVM can do it for me? Is this what "ccc" calling convention
means?
- Paweł
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2009 May 16
2
[LLVMdev] VMKit: msil optimization
Hello,
> As for the state of the MSIL backend of LLVM, I don't think it's for
> production use yet. Assemblies have lots of information in them and
> maintaining them during the MSIL -> LLVM -> MSIL translations should be
> the hard part.
This should be pretty hard. MSIL is definitely much more high level
than LLVM, that's why significant portion of information will
2017 Oct 19
2
Why x86_64 divq is not used for 128-bit by 64-bit division?
Hi there,
Let's have this C code:
unsigned long div(unsigned __int128 n, unsigned long d)
{
return n / d;
}
I would assume that the divq is the perfect match here. But the compiler
generates the
code that calls the __udivti3 procedure which performs 128-bit by 128-bit
division.
Why is divq not used here?
- Paweł
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