similar to: [LLVMdev] Fixed-point arithmetic

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] Fixed-point arithmetic"

2012 Feb 08
0
[LLVMdev] Fixed-point arithmetic
On Wed, Feb 8, 2012 at 3:39 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi all, > > Is there any ongoing work in LLVM/Clang to support fixed-point > arithmetic as described in ISO/IEC TR 18037 ? No. > It seems that gcc has support for it since 2007 and it would be useful > for us to add such support. > Just to get an idea if we decide to work on this, how long
2013 Aug 10
2
[LLVMdev] Fixed-point arithmetic
Hi, Is there anyone else interested in fixed-point arithmetic support in clang/llvm? Regards, Sergey On Sat, Aug 3, 2013 at 12:14 AM, Sergey Yakoushkin < sergey.yakoushkin at gmail.com> wrote: > Hi all, > > Were there any further discussion or progress with the fixed point support > (ISO/IEC TR 18037) in the meantime? >
2012 May 08
4
[LLVMdev] Address space information dropped
Hi Eli, On 07/05/2012 18:15, Eli Friedman wrote: > On Mon, May 7, 2012 at 5:15 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: >> Hi all, >> >> Tuning my TargetAsmPrinter implementation in the back-end side, I >> discovered that the address space number is not passed down while >> emitting global variables with constant initializers. The information is
2012 May 08
0
[LLVMdev] Address space information dropped
On Tue, May 8, 2012 at 4:59 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Eli, > > > On 07/05/2012 18:15, Eli Friedman wrote: >> >> On Mon, May 7, 2012 at 5:15 AM, Ivan Llopard<ivanllopard at gmail.com> >>  wrote: >>> >>> Hi all, >>> >>> Tuning my TargetAsmPrinter implementation in the back-end side, I
2011 Dec 10
5
[LLVMdev] Types inference in tblgen: Multiple exceptions
Hi Eli, Thanks for your response. Please see my responses below. On 10/12/2011 00:28, Eli Friedman wrote: > On Fri, Dec 9, 2011 at 4:46 AM, Llopard Ivan<ivanllopard at gmail.com> wrote: >> Hi all, >> >> I am writing a back-end for a processor that has complex type registers. >> It has two functional units to perform complex multiplications. >> From clang,
2012 May 29
2
[LLVMdev] [PATCH] handleMoveIntoBundle assertion
Hi Ivan, I'm just looking into it now. Thanks for working on this. - Lang. On Tue, May 29, 2012 at 6:50 AM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi again, > > Just forgot to add PATCH prefix to my message! Could you please review it ? > > Ivan > > Le 26/05/2012 00:52, Ivan Llopard a écrit : > > Hi, > > > > I have a custom
2012 May 07
4
[LLVMdev] Address space information dropped
Hi all, Tuning my TargetAsmPrinter implementation in the back-end side, I discovered that the address space number is not passed down while emitting global variables with constant initializers. The information is dropped at AsmPrinter::EmitGlobalConstant() function call which defaults it to zero. I would like to emit target-dependent asm directives depending on the address space of constant
2012 Mar 23
2
[LLVMdev] Fixing VAARG on PPC64
On Fri, 23 Mar 2012 09:50:12 +0100 Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Finkel, > > Le 23/03/2012 05:50, Hal Finkel a écrit : > > The PowerPC backend on PPC64 for non-Darwin (SVR4 ABI) systems > > currently has a problem handling integer types smaller than 64 bits. > > This is because the ABI specifies that these types are > > zero-extended
2011 Dec 10
1
[LLVMdev] Types inference in tblgen: Multiple exceptions
On 10/12/2011 01:32, Eli Friedman wrote: > On Fri, Dec 9, 2011 at 4:12 PM, Ivan Llopard<ivanllopard at gmail.com> wrote: >> Hi Eli, >> Thanks for your response. Please see my responses below. >> >> >> On 10/12/2011 00:28, Eli Friedman wrote: >>> On Fri, Dec 9, 2011 at 4:46 AM, Llopard Ivan<ivanllopard at gmail.com> >>> wrote:
2012 Mar 07
2
[LLVMdev] Data/Address registers
Hi Jim, Thanks for your response. Le 06/03/2012 22:54, Jim Grosbach a écrit : > Hi Ivan, > On Mar 3, 2012, at 4:48 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: > >> Hi, >> >> I'm facing a problem in llvm while porting it to a new target and I'll >> need some support. >> We have 2 kind of register, one for general purposes (i.e.
2012 Mar 23
0
[LLVMdev] Fixing VAARG on PPC64
Le 23/03/2012 17:02, Hal Finkel a écrit : > On Fri, 23 Mar 2012 09:50:12 +0100 > Ivan Llopard<ivanllopard at gmail.com> wrote: > >> Hi Finkel, >> >> Le 23/03/2012 05:50, Hal Finkel a écrit : >>> The PowerPC backend on PPC64 for non-Darwin (SVR4 ABI) systems >>> currently has a problem handling integer types smaller than 64 bits. >>> This
2012 Mar 14
2
[LLVMdev] Lowering formal pointer arguments
Hi, How can I get the llvm-type of the formal argument while lowering it ? My target needs to map pointer and non-pointer parameters to different registers. In addition, parameter lowering is address space dependent (another reason why I need such information). Looking at the DAGBuilder, I found that it is dropping it when translating llvm-types to BE types. Even if the base type is saved
2012 Mar 28
2
[LLVMdev] Remove subreg copies
Hi, I'm facing a problem in my BE while trying to remove certain copies. Here is a code snippet which I would like to optimize %vreg1<def> = READF32r; vRRegs:%vreg1 %vreg2<def> = COPY %vreg1:rsub_h; iRSubRegs:%vreg2 vRRegs:%vreg1 %vreg3<def> = COPY %vreg1:rsub_l; iRSubRegs:%vreg3 vRRegs:%vreg1 This code produces subreg-to-subreg copies but I would like to have direct
2012 Nov 21
4
[LLVMdev] Disable loop unroll pass
Hi, We've a target which has hardware support for zero-overhead loops. Currently, we cannot detect them because the loop unroller is unrolling them before entering into the codegen. Looking at its implementation, it seems that it checks if it is profitable to unroll it or not based on certain parameters. Given that zero cost loops building is based more or less on the same constraints
2012 Nov 21
2
[LLVMdev] Disable loop unroll pass
Hi Hal, On 21/11/2012 22:38, Hal Finkel wrote: > ----- Original Message ----- >> From: "Ivan Llopard" <ivanllopard at gmail.com> >> To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> >> Sent: Wednesday, November 21, 2012 10:31:07 AM >> Subject: [LLVMdev] Disable loop unroll pass >> >> Hi, >> >> We've a
2012 May 23
2
[LLVMdev] Predicate registers/condition codes question
Hi Ivan, On Tue, May 22, 2012 at 5:09 PM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Sebastian, > > On 22/05/2012 23:25, Sebastian Pop wrote: >> So my question is how do we specify that for most of the operations i8 >> should be promoted to i32 and that only a few logical operations are >> legal on i8? > > I think the combo
2011 Dec 10
0
[LLVMdev] Types inference in tblgen: Multiple exceptions
On Fri, Dec 9, 2011 at 4:12 PM, Ivan Llopard <ivanllopard at gmail.com> wrote: > Hi Eli, > Thanks for your response. Please see my responses below. > > > On 10/12/2011 00:28, Eli Friedman wrote: >> >> On Fri, Dec 9, 2011 at 4:46 AM, Llopard Ivan<ivanllopard at gmail.com> >>  wrote: >>> >>> Hi all, >>> >>> I am writing
2012 May 29
0
[LLVMdev] [PATCH] handleMoveIntoBundle assertion
Patch looks good. Committed in r157632. Thanks Ivan! - Lang. On Tue, May 29, 2012 at 11:00 AM, Lang Hames <lhames at gmail.com> wrote: > Hi Ivan, > > I'm just looking into it now. Thanks for working on this. > > - Lang. > > > On Tue, May 29, 2012 at 6:50 AM, Ivan Llopard <ivanllopard at gmail.com>wrote: > >> Hi again, >> >> Just
2012 Mar 15
2
[LLVMdev] Lowering formal pointer arguments
Le 15/03/2012 03:07, Akira Hatanaka a écrit : > If you need llvm::Argument, this returns the iterator pointing to the > first argument: > > Function::const_arg_iterator Arg = > DAG.getMachineFunction().getFunction()->arg_begin(); Thanks Akira. Ivan > > On Wed, Mar 14, 2012 at 8:16 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: >> Hi, >> >> How
2012 Mar 14
2
[LLVMdev] Data/Address registers
Le 07/03/2012 17:36, Jim Grosbach a écrit : > On Mar 7, 2012, at 6:23 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: > >> Hi Jim, >> >> Thanks for your response. >> >> Le 06/03/2012 22:54, Jim Grosbach a écrit : >>> Hi Ivan, >>> On Mar 3, 2012, at 4:48 AM, Ivan Llopard<ivanllopard at gmail.com> wrote: >>>