similar to: [LLVMdev] Not Understanding Use

Displaying 20 results from an estimated 700 matches similar to: "[LLVMdev] Not Understanding Use"

2004 Jul 08
4
[LLVMdev] PHI nodes in machine code
Could anybody quickly explain why PHI nodes instructions are necessary in machine code? And why the code in LiveVariables.cpp which looks at those PHI nodes (line 249 and below) is necessary. The reason I'm asking is that I try to support 64-bit comparison and I do it by generating code like: // if high1 cond high2: goto operand0 // if high1 reverse_cond high2:
2004 Jul 08
0
[LLVMdev] PHI nodes in machine code
On Thu, Jul 08, 2004 at 08:06:29PM +0400, Vladimir Prus wrote: > Could anybody quickly explain why PHI nodes instructions are necessary > in machine code? And why the code in LiveVariables.cpp which looks at > those PHI nodes (line 249 and below) is necessary. LLVM Machine code is in SSA. Let's say you want to do r = a cond b But doing this: if (a cond b) then r = 1
2018 Sep 10
3
How to avoid multiple registers definitions in customInserter.
Hi, I'm lowering some of the logical operators (by example the | operator) on integer32. Sadly my target only provide native instruction on high and low parts of 32 bits registers. So, I have to generate a sequence of two native instructions (LOR followed by HOR). I've introduced an Pseudo instruction with a custom inserter. def OR_A_oo : CLPPseudoInst<(ins
2009 May 09
0
[LLVMdev] Instruction Conversion
Rotem Varon wrote: > Hi, > > Let say i am writing a code inside basic block pass and iterating all > the instructions inside, > and i encountered in this instruction : If you're asking how to get the operands of an Instruction, use the getOperand() method: Value * Operand1 = I->getOperand(0); Value * Operand2 = I->getOperand(1); The LLVM doxygen documentation
2014 Mar 06
2
[LLVMdev] Upstreaming PNaCl's IR simplification passes
> > Just in case it gets lost in my longer reply, I want to emphasize that if > these will be used to simplify the in-tree backends and those backend > maintainers are on board, then I am *totally* in favor of this going into > the tree. My concerns are heavily based on the fact that as proposed, none > of that seems likely to happen. > > > Framing the problem
2011 Jul 13
3
How to compile OpenSSH on HP-UX10
I did this as a project back in the early 2002, and I had a nice little how-to to walk me through it. Many work places and moves, and I've lost it. I have a friend who asked me about this recently, and I can't seem to find anything on the web, or the how-to I used (not surprised). If I remember correctly, you needed an up-to-date zlib, egd (or prng), OpenSSL, tcpwrappers, and OpenSSH.
2007 Dec 05
3
[LLVMdev] Inserting Instructions After Instructions
Dear All, Given a pointer to an instruction, what is the easiest way to insert one or more new instructions after that instructions? We used to find the next instruction using Instruction::getNext(), but this method seems to have been made private now. -- John T.
2005 Feb 07
0
[LLVMdev] Segmentation Fault(Modifying BasicBlockPlacement.cpp)
Hi, I have been trying to randomize blocks in a program and modified "BasicBlockPlacement.cpp" for the purpose but getting segmentation fault.I am not able to determine the problem.Can anyone please decrypt these error messages or suggest what might be the possible cause of failure? -----------------------------------------------------------------------------------------------------
2007 Sep 19
0
[LLVMdev] 2.1 Pre-Release Available (testers needed)
On Wed, Sep 19, 2007 at 05:24:12PM +1000, Emil Mikulic wrote: > http://goanna.cs.rmit.edu.au/~emil/llvm2.1-check-debug.txt Here's an ARM test that cores: $ llvm-as < /home/emil/ll/llvm-2.1/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll | llc -march=arm -mattr=+v6,+vfp2 Segmentation fault (core dumped) $ gdb `which llc` llc.core [...] (gdb) where #0 0x0853d606 in
2005 Feb 07
2
[LLVMdev] Segmentation Fault(Modifying BasicBlockPlacement.cpp)
On Mon, 7 Feb 2005, Tanu Sharma wrote: > I have been trying to randomize blocks in a program and modified > "BasicBlockPlacement.cpp" for the purpose but getting segmentation > fault.I am not able to determine the problem.Can anyone please decrypt > these error messages or suggest what might be the possible cause of > failure? I'd be happy to fix this, but I need
2004 Jul 08
0
[LLVMdev] PHI nodes in machine code
PHI nodes within machine code were originally used by the Sparc back-end but they turned out not to be necessary. Instead, LLVM phis are lowered to copy instructions in the machine code (I believe this happens just after instruction selection). As far as I know, the machine PHI nodes are not used by the x86 back-end and you shouldn't need them if you insert the right copies. --Vikram
2004 Jul 09
2
[LLVMdev] PHI nodes in machine code
Misha Brukman wrote: > LLVM Machine code is in SSA. This explains quite a lot. I though it's possible to just reduce convert phis into copy instructions in predecessors -- all of which will have the same destination register. > gets you two definitions of r. So we have machine PHI nodes merge the > two possible values into one for result of r. These phis get removed > after
2009 Jun 23
2
[LLVMdev] lli aborts on arm QEMU
I get the following error when I try to run arm lli on QEMU: lli: llvm-arm/src/llvm/include/llvm/ADT/ilist.h:197: typename bidirectional_iterator<NodeTy, int>::reference llvm::ilist_iterator<NodeTy>::operator*() const [with NodeTy = llvm::RecyclerStruct]: Assertion `Traits::getNext(NodePtr) != 0 && "Dereferencing end()!"' failed. 0 lli 0x006abbfc Stack dump: 0.
2020 Jan 29
2
Value &operator=(const Value &) = delete;
Does it mean we can not dereference the Value variables? Value *val = some operand of an instruction; Value *val2= some operand of another instruction; I am trying to rewire the operand values of an instruction using: *val = *val2; It seems that this is not allowed. Thanks, -- Abid M. Malik ****************************************************** "I have learned silence from the
2007 May 17
8
[LLVMdev] Antw.: 2.0 Pre-release tarballs online
Hi, Op 15-mei-07, om 10:23 heeft Tanya M. Lattner het volgende geschreven: 1) Download llvm-gcc4 binary and llvm. Compile and run make check. I did a debug build on OSX 10.4.9 and everything went fine. Results of "make check" (see ppc.log): === Summary === # of expected passes 1630 # of unexpected failures 21 # of expected failures 2
2005 Feb 07
0
[LLVMdev] Segmentation Fault(Modifying BasicBlockPlacement.cpp)
Thanks a lot for replying Chris, I m trying to randomize the blocks in a program.I generate a random number( between the current "InsertPos" and the last block), and then iterate through the list of basicblocks , picking up block with position equal to that of the random number and place it into the current InsertPos and increment InsertPos. Running it like this:
2009 May 09
2
[LLVMdev] Instruction Conversion
Hi, Let say i am writing a code inside basic block pass and iterating all the instructions inside, and i encountered in this instruction : %3 = add i32 %1, 2 I want to convert this instruction to something like this: add R1, 2, R3 I know the opocode, but i what i need is, the operands %1 and 2 (in this example). I will be grateful if some one will tell me how to do so . -------------- next
2010 Jan 29
5
random permuted block randomization
Hi, I am very new to R. Just started yesterday. I have to generate a sequence of 40 random treatments using permuted block randomization with a block size of 8. Then I have to plot moving averages for the resulting sequence. I have tried the sample function but I dont know if wht i did is right or not > sample(c(1,1,1,1,2,2,2,2),8) Any ideas please? -- Ayesha Khan MS Bioinformatics Dept. of
2009 Sep 27
5
[LLVMdev] A basicblock iterator bug in llvm
Dear developers: When I am doing basicblock pass, I meet a bug: there is an iterator "I" in a basicblock, and it is not pointing to the first instruction in this basicblock. However, "I--;" will fail by an assertion. The basic block ("I" is pointing to the second instruction) in test.ll: bb: ; preds = %bb1 %1 = call i32 (i8*, ...)* @printf(i8* noalias
2005 Feb 05
3
[LLVMdev] Improving Makefile.rules header install rules [PATCH]
>> Is attached patch acceptable? > > Looks great, applied, thanks! > http://mail.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20050131/023931.html Thanks! >> Also I have in Makefile.rules (but not include in patch) some >> modification for simplify used common Makefile.rules in LLVM projects and >> non-LLVM project (guarding some LLVM specific parts by ifdef