similar to: [LLVMdev] How to properly use copyValue?

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] How to properly use copyValue?"

2012 Feb 04
0
[LLVMdev] How to properly use copyValue?
Ryan Taylor wrote: > Since there are no constructors for Value, how do you properly insert a > new Value? Value is a pure base. If you want to construct a new Value, then you want to construct a global variable or instruction or argument or something in particular. > If I create a pointer Value *newValue and then call > AA.copyValue(oldValue, newValue), this does not work, since
2012 Feb 05
1
[LLVMdev] How to properly use copyValue?
Nick, First, thanks for responding. Secondly, I just want to create an exact copy of an already exisitng Value, this should be pretty simple to do but I'm unclear on how to do this? For example, PHINode::getIncomingValue (unsigned) returns a "Value" and I want to make a copy of that Value. Is there some other way to do this other than copyValue() that I'm missing? On Sat,
2015 Apr 30
2
búsqueda y sustitución masiva
Hola a tod en s, explico lo que estoy intentando hacer... Tengo un listado de url comprimidas de twitter, entre las cuales hay muchas repetidas, por lo que el número de registros llega a más de 15K. Por otro lado tengo otra lista de esas url únicas con su equivalente ya descomprimido llegando a un registro de 900. El problema que tengo es que estoy intentando hacer un loop para hacer la
2013 May 08
0
[LLVMdev] Predicated Vector Operations
Jeff Bush <jeffbush001 at gmail.com> writes: > I'm trying to understand how predicated/masked instructions can be > generated in llvm, specifically an instruction where a set bit in the > mask will write the new result into the corresponding vector lane in > the destination and a clear bit will cause the lane in the destination > to remain what it was before the
2013 May 07
6
[LLVMdev] Predicated Vector Operations
I'm trying to understand how predicated/masked instructions can be generated in llvm, specifically an instruction where a set bit in the mask will write the new result into the corresponding vector lane in the destination and a clear bit will cause the lane in the destination to remain what it was before the instruction executed. I've seen a few places that suggest 'select' is the
2013 May 09
2
[LLVMdev] Predicated Vector Operations
On May 9, 2013, at 3:05 PM, Jeff Bush <jeffbush001 at gmail.com> wrote: > On Thu, May 9, 2013 at 8:10 AM, <dag at cray.com> wrote: >> Jeff Bush <jeffbush001 at gmail.com> writes: >> >>> %tx = select %mask, %x, <0.0, 0.0, 0.0 ...> >>> %ty = select %mask, %y, <0.0, 0.0, 0.0 ...> >>> %sum = fadd %tx, %ty >>> %newvalue
2013 May 10
0
[LLVMdev] Predicated Vector Operations
On May 10, 2013, at 11:53 AM, dag at cray.com wrote: > Jeff Bush <jeffbush001 at gmail.com> writes: > >> Ah, I think I get it now. This was mentioned earlier in the thread, >> but it didn't click at the time. It sounds like I can do instruction >> selection with a pattern like (omitting selection of the sources): >> >> let Constraints = "$dst
2013 May 09
0
[LLVMdev] Predicated Vector Operations
On Thu, May 9, 2013 at 8:10 AM, <dag at cray.com> wrote: > Jeff Bush <jeffbush001 at gmail.com> writes: > >> %tx = select %mask, %x, <0.0, 0.0, 0.0 ...> >> %ty = select %mask, %y, <0.0, 0.0, 0.0 ...> >> %sum = fadd %tx, %ty >> %newvalue = select %mask, %sum, %oldvalue >> >> I believe the generated instructions depend on whether
2012 Aug 16
3
[LLVMdev] error: instruction requires: thumb2
Hi Everybody, I recently did a cross-compiling using clang (built with host=x86, target=arm) with the following command: > clang -march=armv7-a -mfloat-abi=soft -ccc-host-triple arm-none-linux-gnueabi -integrated-as main.c -o main.o -c and get error message: ------------------------------------------------------- main.c:9:9: error: instruction requires: thumb2 "ldrex
2012 Aug 16
0
[LLVMdev] error: instruction requires: thumb2
On Thu, Aug 16, 2012 at 12:55 PM, Lei Zhao <leizhao833 at gmail.com> wrote: > Hi Everybody, > > I recently did a cross-compiling using clang (built with host=x86, target=arm) with the following command: > > > clang -march=armv7-a -mfloat-abi=soft -ccc-host-triple arm-none-linux-gnueabi -integrated-as main.c -o main.o -c > > and get error message: > >
2012 Aug 16
2
[LLVMdev] error: instruction requires: thumb2
It works. But a follow-up question: why do I have to compile it to thumb mode in order to pass the compilation? Is there a way to make it compile to regular arm mode? Thanks. - Lei On Aug 16, 2012, at 4:00 PM, Eli Friedman wrote: > On Thu, Aug 16, 2012 at 12:55 PM, Lei Zhao <leizhao833 at gmail.com> wrote: >> Hi Everybody, >> >> I recently did a cross-compiling
2016 Aug 25
2
InstList insert depreciated?
Jon, > You want: > TaintVar->insertAfter(FirstI); This worked! Thank you. On Thu, Aug 25, 2016 at 9:38 AM, Jonathan Roelofs <jonathan at codesourcery.com> wrote: > > > On 8/25/16 7:01 AM, Shehbaz Jaffer via llvm-dev wrote: >> >> I tried an alternative way of adding instruction by first getting the >> first instruction of the basic block, and then
2013 May 10
4
[LLVMdev] Predicated Vector Operations
Jeff Bush <jeffbush001 at gmail.com> writes: > Ah, I think I get it now. This was mentioned earlier in the thread, > but it didn't click at the time. It sounds like I can do instruction > selection with a pattern like (omitting selection of the sources): > > let Constraints = "$dst = $oldvalue" in { > def MASKEDARITH : MyInstruction< >
2009 Jan 08
2
[LLVMdev] insertAfter method Patch
Hi, I have added an insertAfter method to the ilist and Instruction classes. The methods are implemented as efficiently as the currently existing insert and insertBefore methods. The insertAfter method was created to mirror a similar method in another compiler in order to ease an ongoing port. The patch, which is very small is included as AddInsertBefore.patch. Additionally, I wrote a small test
2012 Aug 16
0
[LLVMdev] error: instruction requires: thumb2
Sure. Use legal ARM mode syntax for the instruction. Specifically, there is no offset immediate for the ARM mode LDREX instruction. It's illegal syntax to supply one, even if it's zero. -Jim On Aug 16, 2012, at 2:36 PM, Lei Zhao <leizhao833 at gmail.com> wrote: > It works. But a follow-up question: why do I have to compile it to thumb mode in order to pass the compilation? Is
2013 May 10
0
[LLVMdev] Predicated Vector Operations
Ah, I think I get it now. This was mentioned earlier in the thread, but it didn't click at the time. It sounds like I can do instruction selection with a pattern like (omitting selection of the sources): let Constraints = "$dst = $oldvalue" in { def MASKEDARITH : MyInstruction< (outs VectorReg:$dst), (ins MaskReg:$mask, VectorReg:$src1, VectorReg:$src2,
2009 Jan 08
2
[LLVMdev] insertAfter method Patch
John Criswell wrote: > Small nitpick: in Instruction.cpp, the comment for insertAfter says > insertBefore and not insertAfter. > :) > > -- John T. > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev > Thanks for spotting
2007 Oct 03
4
form_remote_tag :onsubmit not working.
Hi, Has anyone successfully implemented the :onsubmit option for form_remote_tag. It doesn''t seem to work for me. Is there any specific version of rails which is required for the same. Here''s my piece of code. <script> function set_tojid(){ alert(''onsubmit''); } </script> <%= form_remote_tag :update => '''', :url => {
2009 Jan 08
0
[LLVMdev] insertAfter method Patch
Thomas B. Jablin wrote: > Hi, > I have added an insertAfter method to the ilist and Instruction classes. The methods are implemented as efficiently as the currently existing insert and insertBefore methods. The insertAfter method was created to mirror a similar method in another compiler in order to ease an ongoing port. The patch, which is very small is included as AddInsertBefore.patch.
2011 May 02
3
[LLVMdev] difficulty in replicating a sequence of instructions + inserting at a different location -- "instruction doesn't dominate all uses"
I am having difficulty in replicating a sequence of instructions (2+, with def-use dependencies within) and inserting them at a different location. I have tried a few different approaches (IRBuilder, new Instruction(), I->clone(), insertBefore/insertAfter,etc.), all leading to the same error msg: "Instruction doesn't dominate all uses" The DevList has a few previous