Displaying 20 results from an estimated 700 matches similar to: "[LLVMdev] dragonegg arm patch"
2012 Jan 29
0
[LLVMdev] dragonegg arm patch
Hi Jin-Gu,
> I made a patch for dragonegg. This patch is for dragonegg to generate arm
> assembly code.
thanks for working on this.
>
> Dragonegg is compiled with this patch after building gcc-4.6 as cross compiler
> for arm and
>
> then dragonegg can generate arm assembly code.
>
> It currently makes errors to build dragonegg and llvm from svn. so I made a
> patch
2012 Jan 29
1
[LLVMdev] dragonegg arm patch
Hi Duncan,
I appreciate your kind review.
I'd like to help you to build an ARM cross compiler.
I built GCC as following.
1. Download "arm-2010.09-50-arm-none-linux-gnueabi-i686-pc-linux-gnu.tar.bz2"
You can find this file on https://sourcery.mentor.com/sgpp/lite/arm/portal/release1600.
(Please click "IA32 GNU/Linux TAR" on Packages.)
2. Extract this file on your linux
2012 Jan 30
2
[LLVMdev] dragonegg arm patch
Hi Duncan,
I send a modified patch which doesn't use reference type of CallingConv::ID.
Thanks,
Jin-Gu Kang
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2012 Feb 02
1
[LLVMdev] dragonegg arm patch
Thanks for applying this patch. I really appreciate that.
Sincerely,
Jin-Gu Kang
2009 Oct 07
2
[LLVMdev] llvm-gcc configure options for ARM target at llvm-gcc build time
Dear LLVM members.
I am building llvm-gcc in version 2.5 for ARM target.
I used command line option as following:
>../src/configure --prefix=/home/jaykang10/Projects/LLVM/front_end_test/bin/ --enable-languages=c,c++ --enable-checking --enable-llvm=/home/jaykang10/Projects/LLVM/bin/ --disable-bootstrap --disable-multilib --target=arm-eabi
And I got a error message as following:
...
gcc -c -g
2009 Sep 30
5
[LLVMdev] long double type on ARM
Dear LLVM members.
I am compiling coreutils-7.4 package for ARM linux using LLVM 2.5 version.
When i compiled 'od' program in coreutils package using LLVM 2.5,
i could see the error message on llc processing.
> llvm-gcc -emit-llvm ./od.c -c -o ./od.bc -other-options...
> llc -march=arm ./od.bc -f -o ./od.s
llc:
2009 Sep 30
0
[LLVMdev] long double type on ARM
Unlike llvm itself, llvm-gcc needs to be configured for a particular
target architecture. It looks like you're using a copy of llvm-gcc
that was built to generate x86 code.
On Sep 30, 2009, at 6:27 AM, Jin Gu Kang wrote:
> Dear LLVM members.
>
> I am compiling coreutils-7.4 package for ARM linux using LLVM 2.5
> version.
>
> When i compiled 'od' program in
2016 Jun 25
2
Question about VectorLegalizer::ExpandStore() with v4i1
Hi All,
I have a problem with VectorLegalizer::ExpandStore() with v4i1.
Let's see a example.
* LLVM IR
store <4 x i1> %edgeMask_for.body1314, <4 x i1>* %27
* SelectionDAG before vector legalization
ch = store<ST1[%16](align=4), trunc to v4i1> t0, t128, t32, undef:i64
* SelectionDAG after vector legalization
ch = store<ST1[%16](align=4), trunc to i1> t0, t133, t32,
2009 Sep 30
2
[LLVMdev] long double type on ARM
Hi Bob!
I could not find llvm file for ARM target in llvm-gcc 4.2 front end source code.
$llvm-gcc-src/gcc/config.gcc file
alpha*-*-*)
cpu_type=alpha
need_64bit_hwint=yes
# LLVM LOCAL begin
out_cxx_file=alpha/llvm-alpha.cpp
# LLVM LOCAL end
;;
...
arm*-*-*)
cpu_type=arm
extra_headers="mmintrin.h"
;;
...
i[34567]86-*-*)
cpu_type=i386
# LLVM LOCAL begin
2016 Jun 28
0
Question about VectorLegalizer::ExpandStore() with v4i1
Hi All,
Can someone comment below question whether it is wrong or not please?
2016-06-25 7:52 GMT+01:00 jingu kang <jaykang10 at gmail.com>:
> Hi All,
>
> I have a problem with VectorLegalizer::ExpandStore() with v4i1.
>
> Let's see a example.
>
> * LLVM IR
> store <4 x i1> %edgeMask_for.body1314, <4 x i1>* %27
>
> * SelectionDAG before vector
2009 Sep 30
0
[LLVMdev] long double type on ARM
Hi Jin-Gu Kang!
It are possible that the problem you are experiencing have already been
solved in the current llvm 2.6 release tree and the current svn trunk.
So try using llc from llvm 2.6 release branch or llvm pre2.7 svn trunk!
It would be helpful if you could open a bugreport for this issue and
attach the problematic od.bc since we need a testcase from the bitcode
that exposes the bug inorder
2010 Oct 21
1
[LLVMdev] Structure memory layout
I am pleased to discuss probleams with you. :)
(Your answer is really helpful to me).
If you don't mind I would often like to ask you a question.
Thanks,
Jin-Gu Kang
2010 Oct 21
2
[LLVMdev] Structure memory layout
Hi Renato,
First, I appreciate your answer again. :)
>> %Char = type { c3, c4, c3, c2 }
>> %Short = type { s3, s4, s3, s2 }
>> %Int = type { i3, i4, i3, i2 }
> See, i is not for int (the C data type) but for every integer type on
> any language/platform combination. Normally, booleans are i1 and char
> i8, in ARM short is 16 and int is 32, and all of them use the
2016 Jun 28
2
Question about VectorLegalizer::ExpandStore() with v4i1
On Tue, Jun 28, 2016 at 2:45 AM, jingu kang via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> Hi All,
>
> Can someone comment below question whether it is wrong or not please?
>
> 2016-06-25 7:52 GMT+01:00 jingu kang <jaykang10 at gmail.com>:
>> Hi All,
>>
>> I have a problem with VectorLegalizer::ExpandStore() with v4i1.
>>
>> Let's
2016 Feb 01
2
Question about store with unaligned memory address
Hi Bruce,
Thanks for response.
I also think it is not good way. Do you have the other ways to legalize it?
Thanks,
JinGu Kang
2016-02-01 13:11 GMT+00:00 Bruce Hoult <bruce at hoult.org>:
> In fact this is a pretty bad legalizing/lowering because you only need to
> load and edit for the first and last values in the vector. The other words
> are completely replaced and don't
2010 Oct 20
2
[LLVMdev] Structure memory layout
Hi renato,
First, I really appreciate your answer. :)
The IR in an previous e-mail is incomplete so far and
I am converting it to various shape.
My team members decided to add new types to solve the bitfield's alignment problem.
Let's consider your previous examples:
struct testChar { char a:3; char b:4; char c:3; char d:2; };
struct testShort { short a:3; short b:4; short c:3;
2009 Sep 30
0
[LLVMdev] long double type on ARM
That is from 2.5, and just because there is nothing special listed in
config.gcc does not mean it doesn't work. For 2.5, the ARM port of
llvm-gcc did not require a separate llvm-arm.cpp source file, so
nothing needed to be added to config.gcc. It worked fine as far as I
know.
For 2.6, you will see that there are some ARM-related changes to
config.gcc in llvm-gcc.
On Sep 30, 2009,
2012 Jun 20
3
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
Hello,
Thank you for your kind attention to my issue and your help.
I changed the tool chain and tried again. And there is a little progress
but still have some problem.
Using --sysroot doesn't make clang use linker(ld) in the cross tool.
Most important question is how I can make clang use cross tool linker.
Let me show you my experiment and questions below.
There are two questions.
[Run]
2012 Jun 19
0
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
Hello
> ./clang -v -emit-llvm -ccc-host-triple arm-none-linux-gnueabi
> -I/home/hum/Documents/Projects/llvm_clang/gnuarm-4.0.2/arm-elf/include
> -L/home/hum/Documents/Projects/llvm_clang/gnuarm-4.0.2/arm-elf/bin hello.c
You forgot about sysroot here.
> /home/hum/Documents/Projects/llvm_clang/gnuarm-4.0.2/arm-elf/bin/ld:
> unrecognised emulation mode: armelf_linux_eabi
>
2012 Jun 19
2
[LLVMdev] Is cross-compiling for ARM on x86 with llvm/Clang possible?
Hello Gergö, Joerg and people on our list
With your kind answer, I tried to build a hello world program for
ARM(arm-none-linux-gnueabi) on my x86-64 PC.
Thank you we verified the generated bitcode. The only thing remained is
linking.
Let me brief what I did so far.
1. Built Clang/llvm in a way explained in
http://clang.llvm.org/get_started.html on Ubuntu 11.10 x86-64 PC
2. Downloaded gcc-4.0