similar to: [LLVMdev] Public SmallVectorImpl constructor?

Hi all, Just finished debugging a memory clobbering bug resulting from using SmallVectorImpl directly without realizing this is a bad idea (aside: I was using it directly because llvm::sys::path::append()'s first argument is a SmallVectorImpl<char>). A note in the docs about not using SmallVectorImpl directly would be nice but could we go further and make SmallVectorImpl's

It is suggested in the documentation that if you would have declared a function parameter as SmallVector<Foo,N>&, it is better to instead declare it as SmallVectorImpl<Foo>&. This makes sense, but it seems to me that it is better still to declare it as ArrayRef<Foo>; a quick test suggests it compiles to the same (highly efficient) code, and adds a bit more flexibility in

Hi all, I'm using samba4 as DC and using ssh/nslcd/pam in some machines to lookup ldap base in samba4 to allow access for users. My question is, how can I set the default GID os users to "100", to match the GID of group"users" in my linux machines? All users I create with ADUC is getting UID "513". This machines are joined in the domain. This is my groups: root

How can I configure samba4 to be protected against DNS amplification attacks? Is there a way to set the network I want it to be recursive, like in bind9? My samba4 is receiving attacks and googling I found this: http://dnsamplificationattacks.blogspot.com.br/2014/02/domain-gerdar3ru.html -- --------------------------------------- Bruno Vane S.O. do Brasil Telecomunica??es +55 24 99306-8618 |

Hi, I have some Ubuntu LTS servers running openssh server authenticating to external openldap. I installed a new Ubuntu LTS server with Samba4 to create a domain and is working very well. I managed to make a pfsense firewall authenticate users in this Samba4 ldap. How to make openssh in Ubuntu authenticate users in Samba4 ldap?

Hi, I try to create a backend to support AsmParser, but it hasn't the red part as below. I find the Mips has this. Do you know how to make it appear? Jonathan #ifdef GET_ASSEMBLER_HEADER #undef GET_ASSEMBLER_HEADER // This should be included into the middle of the declaration of // your subclasses implementation of MCTargetAsmParser. unsigned ComputeAvailableFeatures(uint64_t

> what does "refuses to compile" mean? I.e. what error do you get? > Specifically I get this message when compiling with the default -mattr: Call result #2 has unhandled type i32 UNREACHABLE executed at CallingConvLower.cpp:162! 0 llc 0x0000000100a1e115 PrintStackTrace(void*) + 38 1 llc 0x0000000100a1e6d0 SignalHandler(int) + 254 2

Jonathan <gamma_chen at yahoo.com.tw> wrote: > I try to create a backend to support AsmParser, but it hasn't the red part > as below. I find the Mips has this. Do you know how to make it appear? > > Jonathan > > #ifdef GET_ASSEMBLER_HEADER > #undef GET_ASSEMBLER_HEADER > // This should be included into the middle of the declaration of > // your subclasses

Hello, I am working on a backend for a custom ISA that is somewhat similar to the MicroBlaze ISA so I've decided to use that as a starting point. I am trying to compile a custom ray tracer (lots of floating point) and the llvm-g++ frontend generates an fneg instruction which is not supported by the MBlaze backend in the 2.8 release. I added code to emit an fneg assembly instruction and now

Mmm, this code seems to kill polly: #include <stdio.h> #include <stdlib.h> int main() { char *B; int i,j,k,h; const int x = 0, y=0; B = (char *)malloc(sizeof(char)*1024*1024); for (i = 1; i < 1024; i++) for (j = 1; j < 1024; j++) { if (i+j > 1000) B[j] = i; } printf("Random Value: %d", B[rand() % 1024*1024]); return 0; } running: opt

LLVM code base seems to be full of base/interface classes, which have methods like virtual SDValue LowerCall(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool &isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const

Hi, I have been using LLVM+Clang in my project for some time and it has been working just fine up to now (I am currently using version 3.5.1). However, with version 3.6 having just been released, I thought I would give it a try and update my code to use MCJIT rather than the now discontinued JIT. Well, this proved to be a relatively smooth process, and everything is now working fine on

i'm afraid this question is extremely basic, but i've assumed that dumping a .bc file from a module was a trivial operation, but now, first time i have to actually do it from code, for the life of me i can't find one missing step in the process: static void WriteModule ( const Module * M, BitstreamWriter & Stream )

Sorry, I am using CMake+JOM or CMake+Ninja, if Ninja is available on the developer’s machine. Either way, it fails in both cases with a message similar to the one I included below (which was obtained using CMake+Ninja). Just in case, my (current) CMakeLists.txt file can be found at here

Hello, I'm working on integrating the MachinePipeliner.cpp pass into our VLIW backend, and so far we've managed to get it working with some nice speedups. Unlike Hexagon however, our backend doesn't generate hardware loop instructions and so all our loops are a combination of induction variables, comparisons and branches. So when it came to implementing reduceLoopCount for our

While debugging a bootstrap problem, I noticed that SmallVector stores one element in SmallVectorImpl and N - 1 in SmallVector. It also assumes that all elements are continuous in memory. Does C++ makes any guaranties about the relative memory position of a base and parent classes? I haven't studied it a lot, maybe we can keep N elements in SmallVector and pass the pointer to SmallVectorImpl

Spiller::Spill( LiveInterval *li, SmallVectorImpl<LiveInterval*> &newIntervals, const SmallVectorImpl<LiveInterval*> &spillIs ); has two reference vectors which contain a small list of Live Intervals. What is the register allocator's job to do with these intervals other than analysis. What more needed other than to know

Hello, it looks like I do have infinite loop in llc on linux/armv7 platform somewhere in llvm::SmallVectorImpl. Two backtraces obtained with 10 seconds delay are: 0x0099be14 in llvm::SmallVectorTemplateCommon<llvm::SDNode*>::setEnd (this=0x7ee90b38, P=0x5c06988) at /export/home/karel/vcs/llvm-head/include/llvm/ADT/SmallVector.h:103 103 void setEnd(T *P) { this->EndX = P; }

I recently was using llvm code from a process that I manually spawned as a child process and noticed that llvm::sys::path::home_directory() only works if "HOME" is set in the process environment: bool home_directory(SmallVectorImpl<char> &result) { if (char *RequestedDir = getenv("HOME")) { result.clear(); result.append(RequestedDir, RequestedDir +

Hi, im searching for multidomain threads in this list but just found some from late 2014 where Andrew said it is not supported. Could you guy please tell me if this is supported now, I mean, just one DC with two completely distinct domains?