similar to: [LLVMdev] Calling conventions for YMM registers on AVX

Hi, > What is the calling conventions for YMM. According to documents I saw till now, the YMMs are scratch and not saved in callee. > This is also the default behavior of the Intel Compiler. x86_64 Non-windows targets use the rules defined in the x86_64 abi! > In X86InstrControl.td the YMMs are not in "defs" set of call. The XMMs are subregisters of YMMs, and they are in the

I'll explain what we see in the code. 1. The caller saves XMM registers across the call if needed (according to DEFS definition). YMMs are not in the set, so caller does not take care. 2. The callee preserves XMMs but works with YMMs and clobbering them. 3. So after the call, the upper part of YMM is gone. - Elena -----Original Message----- From: Bruno Cardoso Lopes [mailto:bruno.cardoso at

On Jan 9, 2012, at 10:00 AM, Jakob Stoklund Olesen wrote: > > On Jan 8, 2012, at 11:18 PM, Demikhovsky, Elena wrote: > >> I'll explain what we see in the code. >> 1. The caller saves XMM registers across the call if needed (according to DEFS definition). >> YMMs are not in the set, so caller does not take care. > > This is not how the register allocator

On Jan 8, 2012, at 11:18 PM, Demikhovsky, Elena wrote: > I'll explain what we see in the code. > 1. The caller saves XMM registers across the call if needed (according to DEFS definition). > YMMs are not in the set, so caller does not take care. This is not how the register allocator works. It saves the registers holding values, it doesn't care which alias is clobbered. Are you

This is the wrong code: declare <16 x float> @foo(<16 x float>) define <16 x float> @test(<16 x float> %x, <16 x float> %y) nounwind { entry: %x1 = fadd <16 x float> %x, %y %call = call <16 x float> @foo(<16 x float> %x1) nounwind %y1 = fsub <16 x float> %call, %y ret <16 x float> %y1 } ./llc -mattr=+avx

Even if you explicitly specify –stack-alignment=16 the aligned movs are still generated. It is not an issue related to ABI. See my original mail: ./llc -mattr=+avx -stack-alignment=16 < basic.ll | grep movaps | grep ymm | grep rbp vmovaps -176(%rbp), %ymm14 vmovaps -144(%rbp), %ymm11 vmovaps -240(%rbp), %ymm13 - Elena From: Cameron McInally

Hi Elena, On Thu, Mar 1, 2012 at 8:28 PM, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote: > Even if you explicitly specify –stack-alignment=16 the aligned movs are > still generated. > > It is not an issue related to ABI. This looks like PR10841, explanation and the way to solve it: http://llvm.org/bugs/show_bug.cgi?id=10841 Cheers, -- Bruno Cardoso Lopes

Hi Elena, You're correct. LLVM does not align the stack to 32-bytes for AVX and unaligned moves should be used for YMM spills. I wrote some code to align the stack to 32-bytes when AVX spills are present; it does break the x86-64 ABI though. If upstream would be interested in this code, I can arrange with my employer to send a patch to the mailing list. -Cameron On Mar 1, 2012, at 4:09 PM,

Hi Manuel, Thanks for the help. Still persists for me too. Instead of waiting indefinitely, now I get this error: Unhandled Exception ("AphrontDeadlockQueryException") #1205: Lock wait timeout exceeded; try restarting transaction On Thu, Dec 11, 2014 at 11:26 AM, suyog sarda <sardask01 at gmail.com> wrote: > The problem still persist :( > > On 12/11/14, Manuel Klimek

Hi Christine, > I am using LLVM 2.8 and llvm-gcc 4.2. Could you please try svn top-of-tree? Clang is also a better choice here. > The assembly files are attached. In the assembly file, the erroneous result > is associated with 'subcc', while the correct ones are associated with 'or'. -- Bruno Cardoso Lopes http://www.brunocardoso.cc

Hello, I'm interested on implementing the MIPS backend as a student in a compiler course on my university, starting in 2 weeks from now!! I've seen on the mailing list history no one has done it so far (although a lot said they would)! am i right? Thanks! -- Bruno Cardoso Lopes http://www.brunocardoso.org "The knack of flying is learning how to throw yourself at the ground and

Hi, I'm trying to emit FP_ROUND f64 -> f32 considering a mips target that only supports single float point operations. The problem is that f32 is considered legal on this target but f64 doesn't and the only way I can codegen this instruction is using setConvertAction(MVT::f64, MVT::f32, Expand), which issues a EmitStackConvert. What if I want a libcall instead? What should I do? The

I have installed LLVM on my machine (ubuntu) a while ago. I think my LLVM version is 2.8. is it supported in 2.8 ? When I install i didn't configure LLVM for mips. Do I have to configure it when I build ? Thanks in advance. Really appreciate it. --- On Thu, 9/1/11, Bruno Cardoso Lopes <bruno.cardoso at gmail.com> wrote: From: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>

Basic support for Small bss and data. The rest is implemented with target specific logic and will be commited as soon as it's ok to commit this patch. -- Bruno Cardoso Lopes http://www.brunocardoso.cc "When faced with untenable alternatives, you should consider your imperative." -------------- next part -------------- A non-text attachment was scrubbed... Name: smallsections.patch

Hello All, I am trying to cross compile for MIPS on x86 architecture. I want to do it using LLVM ? How can I do it ? Thanks in advance. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110901/b4e68ea3/attachment.html>

Hello, David > How does ${dst:subreg32} work? This is just modifier provided to asmprinting code. Here, it seems, 16 bit register is passed to asmprinter, but it sees modifier and grabs 32-bit superreg. > Can one do the same for sources? Yes, this is just modifier for printing, nothing more... > Is it preferable to use the source modifier or write an EXTRACT_SUBREG > pattern

On 21 July 2015 at 14:27, Evgeny Astigeevich <evgeny.astigeevich at arm.com> wrote: > The book is exactly what is written in its title: getting started. It give > basics of each major part of LLVM. After reading it you will be able to > build it from scratch. What is most important the book shows in details how > components of LLVM are built into a compiler toolchain: from

Hi Can anyone provide insight on the current status of the AVX support in LLVM 2.8? I gather from the release notes that the MC assembler supports it, and clang added support for it. Does clang support mean intrinsics only, or is there support for lowering of some sort of gcc vector extension? If I generate llvm vector instructions, is there support to emit 128 or 256b AVX instructions assuming

Another php type problem; can you please try again. Thanks! On Thu Dec 11 2014 at 1:37:32 PM Bruno Cardoso Lopes < bruno.cardoso at gmail.com> wrote: > I'm facing the same problem. > > On Thu, Dec 11, 2014 at 10:16 AM, suyog sarda <sardask01 at gmail.com> wrote: > > Hi, > > I am facing problem while submitting patch on phab. All things go smooth > - >

I like to get the support of llvm runtime so that I can run some VM that depends on llvm. I googled porting keyword and also simply try to cross compile llvm. Just like to know is it possbile ? Does any modification needed? Thanks MK -- www.skyeye.org