Displaying 20 results from an estimated 7000 matches similar to: "[LLVMdev] acovea for llvm"
2012 Jan 05
1
[LLVMdev] acovea for llvm
I think it is still be hosted on some bzr servers.
Thanks
Xin
On Thu, Jan 5, 2012 at 12:20 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> Is acovea still being distributed? The link that I was able to find
> (http://www.coyotegulch.com/products/acovea/) is no longer valid.
>
> -Hal
>
> On Thu, 2012-01-05 at 12:06 -0500, Xin Tong wrote:
>> Has anyone tried acovea on
2012 Jan 05
0
[LLVMdev] acovea for llvm
Is acovea still being distributed? The link that I was able to find
(http://www.coyotegulch.com/products/acovea/) is no longer valid.
-Hal
On Thu, 2012-01-05 at 12:06 -0500, Xin Tong wrote:
> Has anyone tried acovea on llvm, acovea is a fairly popular software
> package that uses GAs(Genetic Algorithms) to tune compiler
> command-line settings to optimize the performance for a given
2003 Nov 18
2
[LLVMdev] [Fwd: Optimization: Conclusions from Evolutionary Analysis]
I'm cross-posting the message below (from GCC list) because I believe it
would (at some point) be very beneficial to build an evolutionary
optimization pass into LLVM. The idea would be to discover the perfect
set of optimizations for a given program by trying them all and
analyzing the execution times of each. This would be somewhat like
profile driven optimization except the profile is
2003 Nov 18
0
[LLVMdev] [Fwd: Optimization: Conclusions from Evolutionary Analysis]
This is a hot topic in the compiler research community, but the focus
there is on
(a) choosing the right optimization sequences internally and
transparently, rather than through combinations of options,
(b) performance prediction techniques so you don't actually have to run
gazillion different choices, and perhaps can even avoid the problem of
choosing representative inputs, as you talked
2004 Aug 25
1
Testing Performance of R on AIX
Dear R Users,
I compiled two R-1.9.1 environments on IBM P690 AIX platform, one with
optimization level 3(-O3), another with optimization level 2(-O). I
would like to do some performance comparison with these two
environments. Can anybody give me some advices for how to do the
performance test against R?
Thanks in advance.
Kexiao
2017 Mar 18
2
4.0.0 on March 2017 ?
Should not the 4.0.0 release be March _2017_ in the "Release Emails"
section on http://llvm.org/ ?
-Xin
2012 Jan 05
5
[LLVMdev] clang for opencl
I do not know too much about clang, is opencl publicly supported in
clang ? how about cuda ?
Thanks
Xin
2011 Feb 22
2
[LLVMdev] LLVM ExecutionEngine/JIT trampoline question
I have a question on the LLVM JIT
I did some brief memory reading one day and I found that a call to a
non-library function is resolved by the X86CompilationCallback, but the
X86CompilationCallback is reached through a trampoline. why can not the
generated code jump to the X86CompilationCallback function directly ?
0x2b0a6a4d103b: mov $0x2b0a6a561010,%rax
0x2b0a6a4d1045:
2011 Feb 23
1
[LLVMdev] LLVM ExecutionEngine/JIT trampoline question
I understand that we need to push the address to a register then branch
using the register. But i am asking why there is a trampoline there such
that a call to foo is first branched to an snippet and the snippet branches
to the X86CompilationCallback. is this snippet necessary ?
Thanks
Xin
On Tue, Feb 22, 2011 at 12:39 PM, Reid Kleckner <reid.kleckner at gmail.com>wrote:
> The
2012 Mar 13
2
[LLVMdev] GPU thread/block/grid size contraints in LLVM PTX backend
but does it have default values ?
Thanks
Xin
On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote:
> You specify shader model, bit size and etc. arch-specified parameters
> though -march, -mattr and -mcpu, but AFAIK, PTX backend does not use
> the GPU thread/block/grid size information in optimization yet.
>
> On Mon, Mar 12, 2012 at 8:17 PM, Xin
2015 Jul 13
2
[LLVMdev] enable globalsmodref-aa by default
Hello
I am trying to enable globalsmodref-aa by default. globalmodref-aa is a
ModulePass and therefore can be invalidated and need to be rerun.
I see globalsmodref-aa is enabled in LTO passmanager by adding the analysis
pass explicitly. I wonder whether globalsmodref-aa can be enabled/run based
on pass dependencies, i.e. those indicated in getAnalysisUsage().
Thanks,
Xin
-------------- next
2011 Feb 22
0
[LLVMdev] LLVM ExecutionEngine/JIT trampoline question
The address of the callee may be more than 2 GB away in memory, which
cannot be encoded as an immediate offset in the call instruction. So,
the value is first materialized with a mov instruction which can
encode the immediate and then jumped to through a register.
Reid
On Tue, Feb 22, 2011 at 12:03 PM, Xin Tong Utoronto <x.tong at utoronto.ca> wrote:
> I have a question on the LLVM JIT
2003 Nov 19
1
[LLVMdev] [Fwd: Optimization: Conclusions from Evolutionary Analysis]
On Tue, 2003-11-18 at 15:11, Vikram Adve wrote:
> This is a hot topic in the compiler research community, but the focus
> there is on
> (a) choosing the right optimization sequences internally and
> transparently, rather than through combinations of options,
> (b) performance prediction techniques so you don't actually have to run
> gazillion different choices, and perhaps
2012 Jun 18
4
[LLVMdev] Cast Pointer Address to Functions
I have a function address held in an uint64_t. I would like to cast
the function address to a function prototype and create a call to the
function in LLVM. How could I do this ?
Thanks
Xin
2012 Feb 12
3
[LLVMdev] llvm interprocedural analysis and optimization
If I turn on one of the llvm interprocedural optimizations without
turning on the analysis it uses. will the analysis be turned on
automatically ?
Thanks
Xin
2012 Jul 19
4
[LLVMdev] Bind a LLVM variable to a CPU register
I have a constant parameter in a LLVM function. Is there a way to
reserve a CPU register such that it also holds the value of the
parameter in LLVM x86 codegen ?
Thanks
Xin
2015 Jul 18
2
[LLVMdev] LICM for function calls
On 07/15/2015 07:05 PM, Hal Finkel wrote:
> ----- Original Message -----
>> From: "Xin Tong" <trent.xin.tong at gmail.com>
>> To: "Philip Reames" <listmail at philipreames.com>
>> Cc: "Hal Finkel" <hfinkel at anl.gov>, llvmdev at cs.uiuc.edu
>> Sent: Wednesday, July 15, 2015 6:35:11 PM
>> Subject: Re: [LLVMdev] LICM
2015 Apr 10
2
[LLVMdev] LLVM Alias Analysis
Hi Xin,
Thank you for your reply!
I have tried the 3 alias analyses you have mentioned on LLVM 3.5:
1) $ opt -globalsmodref-aa -aa-eval < xxx.bc > /dev/null
(May-alias response 100%)
2) $ opt -tbaa -aa-eval < xxx.bc > /dev/null
(May-alias response 100%)
3) $ opt -cfl-aa -aa-eval < xxx.bc> /dev/null
(Unknown command line argument '-cfl-aa')
It seems that they are not
2012 Jul 19
5
[LLVMdev] Bind a LLVM variable to a CPU register
On 7/19/12 1:23 PM, Jim Grosbach wrote:
> Not really, no.
If you really, really, wanted to do it, you could:
1) Hack the code generator to not use that register. It might be as
simple as modifying the TableGen file to not know that the register exists.
2) Use inline asm to put the constant into that register and fetch it
from that register.
The real question is: what larger goal are you
2012 Mar 15
0
[LLVMdev] GPU thread/block/grid size contraints in LLVM PTX backend
I don't think so, but you should check source code.
On Tue, Mar 13, 2012 at 9:58 PM, Xin Tong <xerox.time.tech at gmail.com> wrote:
> but does it have default values ?
>
> Thanks
>
> Xin
>
> On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote:
>> You specify shader model, bit size and etc. arch-specified parameters
>>