similar to: [LLVMdev] clang for opencl

> NVIDIA did not commit the CUDA patches, yet. But plans to? 2012/1/5 Liu <proljc at gmail.com>: > On Thu, Jan 5, 2012 at 11:39 PM, Xin Tong <xerox.time.tech at gmail.com> wrote: >> I do not know too much about clang, is opencl publicly supported in >> clang ? how about cuda ? > > Anton at ARM commited theOpenCL patches, already. > > NVIDIA did not

On Thu, Jan 5, 2012 at 11:39 PM, Xin Tong <xerox.time.tech at gmail.com> wrote: > I do not know too much about clang, is opencl publicly supported in > clang ? how about cuda ? Anton at ARM commited theOpenCL patches, already. NVIDIA did not commit the CUDA patches, yet. > > Thanks > > Xin > _______________________________________________ > LLVM Developers mailing

but does it have default values ? Thanks Xin On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote: > You specify shader model, bit size and etc. arch-specified parameters > though -march, -mattr and -mcpu, but AFAIK, PTX backend does not use > the GPU thread/block/grid size information in optimization yet. > > On Mon, Mar 12, 2012 at 8:17 PM, Xin

Hi, I wanted to ask whether there is ongoing effort (or an already established tool) that enables to convert CUDA kernels (that uses CUDA specific intrinsics, e.g., threadId.x, __syncthreads(), ...) to LLVM IR. I am aware that I can do this for OpenCL with the help of libclc but I can not find something similar for CUDA. Thanks -------------- next part -------------- An HTML attachment was

On 7/19/12 1:23 PM, Jim Grosbach wrote: > Not really, no. If you really, really, wanted to do it, you could: 1) Hack the code generator to not use that register. It might be as simple as modifying the TableGen file to not know that the register exists. 2) Use inline asm to put the constant into that register and fetch it from that register. The real question is: what larger goal are you

I have a constant parameter in a LLVM function. Is there a way to reserve a CPU register such that it also holds the value of the parameter in LLVM x86 codegen ? Thanks Xin

I don't think so, but you should check source code. On Tue, Mar 13, 2012 at 9:58 PM, Xin Tong <xerox.time.tech at gmail.com> wrote: > but does it have default values ? > > Thanks > > Xin > > On Tue, Mar 13, 2012 at 5:19 AM, Che-Liang Chiou <clchiou at gmail.com> wrote: >> You specify shader model, bit size and etc. arch-specified parameters >>

2012/2/24 Xin Tong <xerox.time.tech at gmail.com>: > Hopefully you mean sometime in the evening on 29th. If this is the > case, count me in. Good point, I forgot to select a time :-) What about 19:00? > Thanks Cheers, Rafael

I am wondering that how does the LLVM PTX backend find out the constraints on executing GPU thread/block/grid size ( i.e. a block can at most have 1024 threads). Can anyone point me to the code ? I need information in the optimizer, how can I get it ? Thanks Xin

On Wed, Apr 8, 2015 at 10:12 AM, Dmitry Mikushin <dmitry at kernelgen.org> wrote: > A tool of this kind here: https://github.com/apc-llc/nvcc-llvm-ir > > 2015-04-08 19:01 GMT+02:00 Ahmed ElTantawy <ahmede at ece.ubc.ca>: > >> Hi, >> >> I wanted to ask whether there is ongoing effort (or an already >> established tool) that enables to convert CUDA

On Thu, Jul 19, 2012 at 2:28 PM, John Criswell <criswell at illinois.edu> wrote: > On 7/19/12 1:23 PM, Jim Grosbach wrote: >> >> Not really, no. > > > If you really, really, wanted to do it, you could: > > 1) Hack the code generator to not use that register. It might be as simple > as modifying the TableGen file to not know that the register exists. In fact

Is there any way to stop this ? /home/socrates/llvm/llvm-3.0.src/benchmarks/powerstone/crc/crc.c:67:1: error: 'main' must return 'int' void main() ^ 1 error generated. Thanks

You specify shader model, bit size and etc. arch-specified parameters though -march, -mattr and -mcpu, but AFAIK, PTX backend does not use the GPU thread/block/grid size information in optimization yet. On Mon, Mar 12, 2012 at 8:17 PM, Xin Tong <xerox.time.tech at gmail.com> wrote: > I am wondering that how does the LLVM PTX backend find out the > constraints on executing GPU

I would like to generate a branch/jump to a native instruction address (set up in the JIT runtime) in LLVM IR. It seems all the branch instructions (except indirect branch) takes a LLVM BasicBlock. What would be the best way to achieve this ? Thanks Xin

Dear R development: I'm not sure if this is the appropriate list, but it's a start. I would like to put together a package which contains a CUDA program on Windows 7. I believe that it has to do with the Makeconf file in the etc directory. But when I just use the nvcc with the shared option, I can use the dyn.load command, but when I use the is.loaded function, it shows FALSE.

can we get a confirmation on who is coming tomorrow ? Thanks Xin 2012/2/24 Andrew Clinton <andrew at sidefx.com>: > It would be fun to meet some other LLVM developers in TO, 7:00 on wed at > beer bistro should work for me. > > Andrew > > > On 02/24/2012 05:22 PM, Rafael Espíndola wrote: >> >> 2012/2/24 Xin Tong<xerox.time.tech at gmail.com>:

Not really, no. On Jul 19, 2012, at 11:14 AM, Xin Tong <xerox.time.tech at gmail.com> wrote: > I have a constant parameter in a LLVM function. Is there a way to > reserve a CPU register such that it also holds the value of the > parameter in LLVM x86 codegen ? > > Thanks > > Xin > _______________________________________________ > LLVM Developers mailing list

It would be fun to meet some other LLVM developers in TO, 7:00 on wed at beer bistro should work for me. Andrew On 02/24/2012 05:22 PM, Rafael Espíndola wrote: > 2012/2/24 Xin Tong<xerox.time.tech at gmail.com>: >> Hopefully you mean sometime in the evening on 29th. If this is the >> case, count me in. > Good point, I forgot to select a time :-) > What about 19:00?

Hi All, I am going to submit a GSoC proposal for LLVM this year, and I would like to first post it here to get constructive feedback before I submit it before the April 8 deadline. This is the first time I have submitted a GSoC proposal, so please be brutal with the feedback. :) Additionally, Che-Liang Chiou (the code owner of the PTX back-end) has agreed to be my mentor if this is accepted.

Hello , How to execute a cuda program using llvm? More specifically, nvcc produces some temporary files during its compilation. I want to convert the .cu.cpp to .ll format and optimize it. The .cu.cpp file contains typedefs and enums used by cuda runtime and also the host part of the code and the ptx file contains the kernel definition. How can i run the program after optimization? Will Rhodin