similar to: [LLVMdev] AMD IL Code Generator Backend for OpenCL

On Dec 12, 2011, at 9:09 AM, Villmow, Micah wrote: LLVM-IR that isn’t generated from AMD’s OpenCL frontend does not produce any AMDIL. Is this because of the way metadata is handled? If so, will that technique be documented? Or can it be reasonably inferred from the source code? Thanks, Marcus -------------- next part -------------- An HTML attachment was scrubbed... URL:

We are working on getting the documentation cleaned up to the point where it can be released. If you look at the test cases, you can infer what needs to be done. Basically since this is targeted for OpenCL, we annotate OpenCL kernels slightly different than normal functions and that is what causes the code to be generated. That being said, on my list of things to do is fix this so that any

Hi Tom, I have a higher-level question regarding this back-end. If I have an LLVM IR module and run it through this back-end, it seems like the only output option is a binary format. Is this a device binary, or another intermediate format? If the input LLVM IR module was a compute kernel, how would I go about executing it on an AMD GPU? Can I use the APP SDK to load the binary, perhaps

Currently, PTX has its own calling conventions where they are split into kernel/device. The AMDIL backend requires very similar calling conventions and I was wondering if we could change the calling conventions from PTX_* to something more generic? Maybe just Kernel/Device? Or would it be preferable to add a new calling convention that is unique for each target, even though it duplicates

From: Justin Holewinski [mailto:justin.holewinski at gmail.com] Sent: Tuesday, December 13, 2011 9:48 AM To: Villmow, Micah Cc: LLVM Developers Mailing List Subject: Re: [LLVMdev] Changes to the PTX calling conventions On Tue, Dec 13, 2011 at 11:25 AM, Villmow, Micah <Micah.Villmow at amd.com<mailto:Micah.Villmow at amd.com>> wrote: Currently, PTX has its own calling conventions where

> -----Original Message----- > From: Stellard, Thomas > Sent: Monday, May 28, 2012 9:07 AM > To: Justin Holewinski > Cc: Villmow, Micah; Tom Stellard; llvmdev at cs.uiuc.edu > Subject: Re: [LLVMdev] RFC: R600, a new backend for AMD GPUs > > On Mon, May 28, 2012 at 08:54:41AM -0700, Justin Holewinski wrote: > > On May 28, 2012 6:44 AM, "Tom Stellard"

Is there a convention for how the LLVM community prefers to have conditional compilation in code intended to be checked in to llvm.org? Our goal is a single code base that can support multiple LLVM revisions, including LLVM TOT. In the long run, of course, we'll simply be able to refer to the backend revision that corresponds to the revision of LLVM in use. If fixes between TOT and that older

Is there a version of the AMDIL back-end that is compatible with LLVM 3.0/3.1? On Tue, May 29, 2012 at 8:33 AM, Villmow, Micah <Micah.Villmow at amd.com>wrote: > > > > -----Original Message----- > > From: Stellard, Thomas > > Sent: Monday, May 28, 2012 9:07 AM > > To: Justin Holewinski > > Cc: Villmow, Micah; Tom Stellard; llvmdev at cs.uiuc.edu >

On May 28, 2012 6:44 AM, "Tom Stellard" <thomas.stellard at amd.com> wrote: > > On Fri, May 25, 2012 at 02:37:26PM -0700, Justin Holewinski wrote: > > Hi Tom, > > > > I have a higher-level question regarding this back-end. If I have an LLVM > > IR module and run it through this back-end, it seems like the only output > > option is a binary

On Tue, Dec 13, 2011 at 11:25 AM, Villmow, Micah <Micah.Villmow at amd.com>wrote: > Currently, PTX has its own calling conventions where they are split into > kernel/device. **** > > The AMDIL backend requires very similar calling conventions and I was > wondering if **** > > we could change the calling conventions from PTX_* to something more > generic?**** >

Eric, Once both AMD and Apple have advanced their respective internal LLVM versions past the point where AMDIL went in to LLVM TOT, then we can rip out all the conditional code and just have the one LLVM TOT. This is about managing the transition to that utopia… ;-) Until then, the choices really come down to having support for multiple LLVM versions in TOT, or having multiple backends.

On Fri, May 25, 2012 at 02:37:26PM -0700, Justin Holewinski wrote: > Hi Tom, > > I have a higher-level question regarding this back-end. If I have an LLVM > IR module and run it through this back-end, it seems like the only output > option is a binary format. Is this a device binary, or another > intermediate format? > > If the input LLVM IR module was a compute kernel,

On Mon, May 28, 2012 at 08:54:41AM -0700, Justin Holewinski wrote: > On May 28, 2012 6:44 AM, "Tom Stellard" <thomas.stellard at amd.com> wrote: > > > > On Fri, May 25, 2012 at 02:37:26PM -0700, Justin Holewinski wrote: > > > Hi Tom, > > > > > > I have a higher-level question regarding this back-end. If I have an > LLVM > > >

Currently top of tree is top of tree and no backwards compatibility, other than the C backend, is promised. I think that instead of asserting that you need to check in conditional compilation for a backend, perhaps, you would be open to other options to accomplish the same needs? My suggestion would be to check in or make some branches for the two older versions and then apply your patches on top

On Tue, Dec 13, 2011 at 12:54 PM, Villmow, Micah <Micah.Villmow at amd.com>wrote: > ** ** > > ** ** > > *From:* Justin Holewinski [mailto:justin.holewinski at gmail.com] > *Sent:* Tuesday, December 13, 2011 9:48 AM > *To:* Villmow, Micah > *Cc:* LLVM Developers Mailing List > *Subject:* Re: [LLVMdev] Changes to the PTX calling conventions**** > > ** ** >

Tom, Two things. One is missing tests. I have some I could send you, but they are mainly OpenCL based for the AMDIL backend, not for the R600. That brings me to the second thing. Are the AMDIL backend and the R600 backend the same, or not? At this point, they really do feel like they are separate back ends, with one dependent on the other. As there is no other backend that is dependent on

On Mon, Mar 26, 2012 at 12:50:07PM -0400, Tom Stellard wrote: > Hi, > > We've been working on an LLVM backend for the previous generation of AMD > GPUs (HD 2XXX - HD 6XXX) and we would like submit it for inclusion in the > main LLVM tree. The latest code can be found in this git repository: > http://cgit.freedesktop.org/~tstellar/llvm/ in the r600-initial-review > branch

On Mon, Mar 26, 2012 at 12:50:07PM -0400, Tom Stellard wrote: > Hi, > > We've been working on an LLVM backend for the previous generation of AMD > GPUs (HD 2XXX - HD 6XXX) and we would like submit it for inclusion in the > main LLVM tree. The latest code can be found in this git repository: > http://cgit.freedesktop.org/~tstellar/llvm/ in the r600-initial-review > branch

On Mon, Apr 09, 2012 at 09:37:37AM -0400, Tom Stellard wrote: > On Mon, Mar 26, 2012 at 12:50:07PM -0400, Tom Stellard wrote: > > Hi, > > > > We've been working on an LLVM backend for the previous generation of AMD > > GPUs (HD 2XXX - HD 6XXX) and we would like submit it for inclusion in the > > main LLVM tree. The latest code can be found in this git

Hi, We've been working on an LLVM backend for the previous generation of AMD GPUs (HD 2XXX - HD 6XXX) and we would like submit it for inclusion in the main LLVM tree. The latest code can be found in this git repository: http://cgit.freedesktop.org/~tstellar/llvm/ in the r600-initial-review branch or if you prefer you can download the entire tree with this link: