similar to: [LLVMdev] llvm-gcc

Displaying 20 results from an estimated 300 matches similar to: "[LLVMdev] llvm-gcc"

2011 Dec 02
0
[LLVMdev] llvm-gcc
On Fri, Dec 2, 2011 at 4:07 PM, Rahil Rahimian <rahil_rahimian at yahoo.com>wrote: > Hi , > > I want to create a bc file by llvm-gcc, and need to pass a input file when > create this file, > how can i do it?I saw options in "*llvm-gcc* [*options*] *filename" but > it could not help me.* > > llvm-gcc -emit-llvm -c foo.c -o foo.bc > ** > *I have an
2011 Sep 06
3
[LLVMdev] bug in TableGen when generating RegisterInfo?
Hi everyone, I found some peculiar behavior of TableGen when generating [TARGET]GenRegisterInfo.inc. Some register overlaps are generated twice in this file, leading to a compilation error. I think this is because in RegisterInfoEmitter.cpp, RegisterAliases are declared as "std::map<Record*, std::set<Record*>, LessRecord>" and a requirement for std::map is that the
2011 Sep 07
0
[LLVMdev] bug in TableGen when generating RegisterInfo?
On Tue, Sep 6, 2011 at 9:34 PM, Alexandru Dura <alexdura at gmail.com> wrote: > Hi everyone, > > I found some peculiar behavior of TableGen when generating > [TARGET]GenRegisterInfo.inc. Some register overlaps are generated twice in > this file, leading to a compilation error. Hi, What do you mean "overlapped register"? > I think this is because in
2011 Jun 23
0
[LLVMdev] Instr Description Problem of MCore Backend
Hello > Finally, I don't know how to describe following instructions in > MCoreInstrInfo.td, because of its variable ins/outs. Or what other files > should I use to finish this description? Do you need the isel support for them? If yes, then you should custom isel them. iirc ARM and SystemZ backends have similar instructions, while only the first one supports full isel for them. In
2011 Jun 23
2
[LLVMdev] Instr Description Problem of MCore Backend
Hi, all: Now I'm working on writing a backend for Moto MCore, but I don't know how to describe some instructions. First, I've already written MCoreRegisterInfo.td like these: class MCoreReg<bits<4> num, string name> : Register<name> { let Namespace = "MCore"; field bits<4> Num = num; } def R0 : MCoreReg< 0, "R0">,
2011 Dec 02
1
[LLVMdev] llvm-gcc
I want to pass a input file to foo.c that contains a picture. how can do it? llvm-gcc -emit-llvm -c foo.c -o foo.bc -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111202/43aec39e/attachment.html>
2011 Nov 03
1
[LLVMdev] memory dependence in loop
Hi all, I want to analyze memory dependence in the loop and to obtain set of memory dependence of an instruction in the loop. Can  anyone assist me in this topic? Regards, Rahil -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111103/1e039510/attachment.html>
2011 Aug 23
2
[LLVMdev] write IR on file
hi how can i write IRinstruction on a file.txt? when i use  {for(inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I,count++)  IRcodefile << std::basic_ostream(*I) <<"\n" } i get  error. is there any way that i can write it on file? -------------- next part -------------- An HTML attachment was scrubbed... URL:
2010 Oct 15
0
[LLVMdev] Have llvm docs been translated into Chinese?
Hi, all: I'm a graduate student in Harbin Engineering University, majoring Computer Architecture, Grade 1. And I wanna translate llvm docs into Chinese if nobody didn't do it before. Now I'm transplanting path profiling to llvm 2.5, just as completed in llvm 1.5. I do some translations in order to make me deeply understand the llvm system. On the other hand, I think the
2008 May 02
6
looking for Mod_Ruby and easy Deployment Options? Sign Here
Hi, http://www.ruby-forum.com/topic/151662#669164 Hi, Please read more on the above link first, which is available in this section of Ruby on Rails. It will give you a clear understanding of Deployment scenario The Author of that thread and Me too, are frustrated with Lack of Shared Hosting and Tough Deployment Scenario, since nothing is shaping up. We do not want to get carried away with
2012 Jan 04
1
[LLVMdev] replace a conditional branch with unconditional branch
Hi all, How can replace a conditional branch with unconditional branch? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120104/f2593dd0/attachment.html>
2009 May 08
1
Rails 3 code...
I would like to see few examples in Rails 3 and would like to see few Rails 3 code. I know, few samples were shown at Rails conference. Can any one point me few of them. Thanks -- Posted via http://www.ruby-forum.com/.
2006 Jan 20
1
Time From String
Is there any Ruby / Rails way to take a string and convert it to time? timefstr Specificallc,y I''d like to convert iso 8601 fromats to Ruby Time objects or ActiveRecord time fields. -- Posted via http://www.ruby-forum.com/.
2000 Mar 01
1
Contingency tables as data frames
{again a message that was sent to owner-r-help (which is me, currently) why on earth ???!??!? reply to R-help or the original sender Brett Presnell; } I'm teaching a categorical data analysis course this term, and a minor "problem" has resurfaced that I have often thought about before. This applies equally to Splus I suppose, but my undergrads aren't using Splus. It
2005 Aug 03
0
Will Shares of This Company be Moving Higher?
Investment Times Alert Issues: (STRONG BUY) We Told last week at 1.20 to WATCH and now its $2.35 and we think it goes to $4.00 on expected news this week... Harbin Pingchuan Pharmaceutical: (PGCN) Current Price: $2.35 Shares Outstanding: 20 Million Market Capitalization: $6 Million Short Term Target: $5.75 12month Target: $10.00 (!!!) ***We told you there was going to be a BIG move on
2011 Dec 02
0
[LLVMdev] RFC: Machine Instruction Bundle
On Dec 2, 2011, at 12:40 PM, Evan Cheng wrote: > ---------------- > | Bundle * | (A MI with special opcode "Bundle") > ---------------- > | > ---------------- > | MI * | > ---------------- >
2011 Dec 02
2
Missing sources in CentOS 6.0
Hello everyone, In the 6.0 release, I have found a gap in the provided source under the SRPMS/ directories on the mirrors. Let's take the 'bash' source as the first example. The version of bash that I find in the binary x86_64 directories is: http://mirror.centos.org/centos-6/6.0/os/x86_64/Packages/bash-4.1.2-3.el6.x86_64.rpm One would expect to find the source to that binary at:
2007 Jun 09
0
CIA biscuit
CAON Takes New Direction. Investors Are All Over It! Chan-On International Inc. Symbol: CAON Close: $0.72 UP 4.35% Volume Jumped through the roof today as CAON announced it has changed its direction and acquired Harbin Hongbo, as wells as its 12 patients for environmentally safe construction materials. Investors are already seeing the potential. We expect great things from CAON with big news
2011 Aug 23
0
[LLVMdev] ShadowStackGC.cpp - More Dead Code?
Hi Bill, I don't think it's dead code, per se -- AFAIK there are still clients of LLVM which use the shadow stack as part of their garbage collection implementation. HLVM is probably the most visible such project. My own project now has its own GC plugin to emit stack maps, rather than relying on the shadow stack. But for what it's worth, I found the shadow stack to be a useful
2011 Dec 02
3
[LLVMdev] Turning on/off instruction extensions
I applied the patch to the trunk version successfully, although I get an error in between: 1 out of 1 hunk FAILED -- saving rejects to file lib/Transforms/IPO/CMakeLists.txt.rej Can I ignore the error? The patch exits normally except for that error. Also, I tried to apply the patch to the LLVM 3.0 but does not work at all. Is the trunk version the only one where the patch can be applied?