similar to: [LLVMdev] About JIT by LLVM 2.9 or later

Displaying 20 results from an estimated 600 matches similar to: "[LLVMdev] About JIT by LLVM 2.9 or later"

2012 Mar 31
1
[LLVMdev] llvm.exp.f32 didn't work
Hi, I found that llvm.exp.f32 didn't work but sqrt works well. I implemented a function like define inlinehint float "my_exp"(float %.value) { .body: %0 = call float @llvm.exp.f32(float %.value) ret float %0 } declare float @llvm.exp.f32(float) nounwind readonly But it generates following ASM: 00280072 movups xmm0,xmmword ptr [esp+8] 00280077 movss dword ptr
2011 Mar 29
2
[LLVMdev] [GSoC] "Microsoft Direct3D shader bytecode backend" proposal
On 3/29/11 5:14 AM, Justin Holewinski wrote: > On Mon, Mar 28, 2011 at 9:22 PM, Charles Davis <cdavis at mymail.mines.edu > <mailto:cdavis at mymail.mines.edu>> wrote: > > Here's the other of my proposals for this year's Google Summer of Code. > (The first is on cfe-dev.) It was suggested to me by Dan Kegel (from the > Wine project, they really
2009 Dec 03
4
[LLVMdev] Win64 Calling Convention problem
Hi! I have discovered a problem with LLVM's interpretation of the Win64 calling convention w.r.t. passing of aggregates as arguments. The following code is part of my host application that is compiled with Visual Studio 2005 in 64-bit debug mode. noise4 expects a structure of four floats as its first and only argument, which is - in accordance with the specs of the Win64 calling convention -
2011 Mar 29
0
[LLVMdev] [GSoC] "Microsoft Direct3D shader bytecode backend" proposal
On Mon, Mar 28, 2011 at 9:22 PM, Charles Davis <cdavis at mymail.mines.edu>wrote: > Here's the other of my proposals for this year's Google Summer of Code. > (The first is on cfe-dev.) It was suggested to me by Dan Kegel (from the > Wine project, they really want this). > > Title: Microsoft Direct3D shader bytecode backend > > Abstract: > > There is a
2008 Jun 27
0
[LLVMdev] Vector instructions
On Jun 27, 2008, at 8:02 AM, Stefanus Du Toit wrote: >>>> <result> = shufflevector <a x <ty>> <v1>, <b x <ty>> <v2>, <d x >>>> i32> >>>> <mask> ; yields <d x <ty>> >>> >>> With the requirement that the entries in the (still constant) mask >>> are >>> within
2008 Jun 27
2
[LLVMdev] Vector instructions
Hi Dan, Thanks for your comments. I've responded inline below. On 26-Jun-08, at 6:49 PM, Dan Gohman wrote: > On Jun 26, 2008, at 1:56 PM, Stefanus Du Toit wrote: >> >> === >> 1. Shufflevector only accepts vectors of the same type >> >> I would propose to change the syntax from: >> >>> <result> = shufflevector <n x <ty>>
2011 Mar 29
3
[LLVMdev] [GSoC] "Microsoft Direct3D shader bytecode backend" proposal
Here's the other of my proposals for this year's Google Summer of Code. (The first is on cfe-dev.) It was suggested to me by Dan Kegel (from the Wine project, they really want this). Title: Microsoft Direct3D shader bytecode backend Abstract: There is a distinct lack of open-source frameworks for compiling HLSL, the shader language used by Direct3D, into bytecode that D3D can
2011 Nov 02
0
[LLVMdev] About JIT by LLVM 2.9 or later
空明流转 <wuye9036 at gmail.com> writes: > Could I wrap LLVM with mingw and expose some C api to called by MSVC? > > And in mingw, I will override the signature float4 foo( float44 ) to > float4* foo( float4*, float44* ); ? > > Is that OK? If you pass and return the structs through pointers, you don't need MinGW in the middle, you can use MSVC directly. Please note that
2007 Jul 20
5
[LLVMdev] Seg faulting on vector ops
Hola LLVMers, I'm looking to make use of the vectorization primitives in the Intel chip with the code we generate from LLVM and so I've started experimenting with it. What is the state of the machine code generated for vectors? In my tinkering, I seem to be getting some wonky machine instructions, but I'm most likely just doing something wrong and I'm hoping you can set me in
2011 Mar 29
0
[LLVMdev] [GSoC] "Microsoft Direct3D shader bytecode backend" proposal
On Mar 29, 2011, at 9:02 AM, Charles Davis wrote: > On 3/29/11 5:14 AM, Justin Holewinski wrote: >> On Mon, Mar 28, 2011 at 9:22 PM, Charles Davis <cdavis at mymail.mines.edu >> <mailto:cdavis at mymail.mines.edu>> wrote: >> >> Here's the other of my proposals for this year's Google Summer of Code. >> (The first is on cfe-dev.) It was
2007 Jul 21
0
[LLVMdev] Seg faulting on vector ops
On Fri, 20 Jul 2007, Chuck Rose III wrote: > I'm looking to make use of the vectorization primitives in the Intel > chip with the code we generate from LLVM and so I've started > experimenting with it. What is the state of the machine code generated > for vectors? In my tinkering, I seem to be getting some wonky machine > instructions, but I'm most likely just doing
2007 Jul 24
2
[LLVMdev] Seg faulting on vector ops
Hrm. This problem shouldn't be target specific. I am pretty sure prologue / epilogue inserter aligns stack correctly if there are stack objects with greater than default stack alignment requirement. Seems to be the initial alloca() instruction should specify 16 byte alignment? Evan On Jul 21, 2007, at 2:51 PM, Chris Lattner wrote: > On Fri, 20 Jul 2007, Chuck Rose III wrote:
2009 Oct 05
5
[LLVMdev] Functions: sret and readnone
Hi all, I'm currently building a DSL for a computer graphics project that is not unlike NVIDIA's Cg. I have an intrinsic with the following signature float4 sample(texture tex, float2 coords); that is translated to this LLVM IR code: declare void @"sample"(%float4* noalias nocapture sret, %texture, $float2) nounwind readnone The type float4 is basically an array of four
2008 Oct 14
4
[LLVMdev] Making GEP into vector illegal?
In Joe programmer language (i.e. C ;) ), are we basically talking about disallowing: float4 a; float* ptr_z = &a.z; ? Won't programmers just resort to: float4 a; float* ptr_z = (float*)(&a) + 3; ? On Oct 14, 2008, at 3:55 PM, Mon Ping Wang wrote: > Hi, > > Something like a sequential type makes sense especially in light of > what Duncan is point out. I agree
2009 Oct 06
2
[LLVMdev] Functions: sret and readnone
On 5 Okt., 23:33, Dan Gohman <goh... at apple.com> wrote: > > Is there a reason it needs to be an array? A vector of four floats > wouldn't have this problem, if that's an option. > Unfortunately that's not an option. At the moment I'm restricting myself to the use of scalar code only, in order to be able to vectorize the code easily later (e.g., float4 as it is
2013 Aug 20
2
[LLVMdev] Failure to optimize vector select
Hi, I've found a case I would expect would optimize easily, but it doesn't. A simple implementation of vector select: float4 simple_select(float4 a, float4 b, int4 c) { float4 result; result.x = c.x ? a.x : b.x; result.y = c.y ? a.y : b.y; result.z = c.z ? a.z : b.z; result.w = c.w ? a.w : b.w; return result; } I would expect this would be optimized to %bool
2012 Feb 28
1
[LLVMdev] How to vectorize a vector type cast?
Since Clang does not seem to allow type casts, such as uchar4 to float4, between vector types, it seems it is necessary to write them as element by element conversions, such as typedef float float4 __attribute__((ext_vector_type(4))); typedef unsigned char uchar4 __attribute__((ext_vector_type(4))); float4 to_float4(uchar4 in) { float4 out = {in.x, in.y, in.z, in.w}; return out; } Running
2007 Jul 20
0
[LLVMdev] Seg faulting on vector ops
Hi Chuck! On Jul 20, 2007, at 11:36 AM, Chuck Rose III wrote: > Hola LLVMers, > > > > I’m looking to make use of the vectorization primitives in the > Intel chip with the code we generate from LLVM and so I’ve started > experimenting with it. What is the state of the machine code > generated for vectors? In my tinkering, I seem to be getting some > wonky
2007 Jul 26
0
[LLVMdev] Seg faulting on vector ops
I am fairly certain this is right. Chuck, can you do a quick experiment for me? Go back to your original code but make sure the alloca instruction specify 16-byte alignment. The code should work. If not, please file a bug. Thanks, Evan On Jul 24, 2007, at 1:58 PM, Evan Cheng wrote: > Hrm. This problem shouldn't be target specific. I am pretty sure > prologue / epilogue inserter
2008 Oct 14
0
[LLVMdev] Making GEP into vector illegal?
On Tue, Oct 14, 2008 at 1:34 PM, Daniel M Gessel <gessel at apple.com> wrote: > In Joe programmer language (i.e. C ;) ), are we basically talking > about disallowing: > > float4 a; > float* ptr_z = &a.z; > > ? That's my reading as well; the argument for not allowing it is just to make optimization easier. We don't allow addressing individual bits either,