similar to: [LLVMdev] stack alignment and backend

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] stack alignment and backend"

2009 May 01
3
[LLVMdev] Stack alignment in JIT compiled code
On Linux x86_64, it is different. The x86-64 ABI says (http://www.x86-64.org/viewvc/trunk/x86-64-ABI/low-level-sys-info.tex?revision=84&content-type=text%2Fplain): >> The end of the input argument area shall be aligned on a 16 byte boundary. In other words, the value (%rsp - 8) is always a multiple of 16 when control is transferred to the function entry point. The stack pointer, %rsp,
2009 Apr 30
3
[LLVMdev] Stack alignment in JIT compiled code
Hi all, i am trying to call an aligned function in my host application from jit compiled bitcode. The call itself is done using an absolute pointer to the function. The host application's functions make heavy use of SSE instructions and are thus operate on a stack aligned to 16 byte. If i call an aligned function in the host application from a frame running jit compiled code, the alignment
2009 Apr 30
0
[LLVMdev] Stack alignment in JIT compiled code
Hello, Simon > So far, i found no way to denote calls to the host function as aligned > or maintain stack alignment throughout the stack frame of the jit > compiled function. Further, the gcc front end (llvm-g++ (GCC) 4.2.1) > seems to ignore directives such as -mpreferred-stack-boundary. Mike is right. It depends on your subtarget: 1. If you're running stuff on Darwin, which has
2015 Aug 31
3
MCRegisterClass mandatory vs preferred alignment?
Looking around today, it appears that TargetRegisterClass and MCRegisterClass only includes a single alignment. This is documented as being the minimum legal alignment, but it appears to often be greater than this in practice. For instance, on x86 the alignment of %ymm0 is listed as 32, not 1. Does anyone know why this is? Additionally, where are these alignments actually defined? I
2015 Aug 28
6
Aligned vector spills and variably sized stack frames
I've run into a problem that I'm trying to figure out how to address and would welcome ideas and feedback. Today, the vectorizer will nicely vectorize loops using the widest legal vector type for the target. On a reasonable recent machine, this will often end up using AVX2 registers which are 32 bytes wide. If during register allocation, we decide to spill one of these registers, we
2009 May 01
0
[LLVMdev] Stack alignment in JIT compiled code
Corrado Zoccolo wrote: > On Linux x86_64, it is different. The x86-64 ABI says > (http://www.x86-64.org/viewvc/trunk/x86-64-ABI/low-level-sys-info.tex?revision=84&content-type=text%2Fplain): > > The end of the input argument area shall be aligned on a 16 byte boundary. > In other words, the value (%rsp - 8) is always a multiple of 16 when control is > transferred to the
2015 Aug 31
2
MCRegisterClass mandatory vs preferred alignment?
On 08/31/2015 03:59 PM, Matthias Braun wrote: > Looks to me like the alignment is specified in tablegen. From Target.td: > > class RegisterClass<string namespace, list<ValueType> regTypes, int alignment, > dag regList, RegAltNameIndex idx = NoRegAltName> > > X86RegisterInfo.td: > > def VR256 : RegisterClass<"X86", [v32i8,
2012 Mar 01
1
[LLVMdev] Stack alignment on X86 AVX seems incorrect
On Mar 1, 2012, at 3:04 PM, Cameron McInally <cameron.mcinally at nyu.edu> wrote: > On Thu, Mar 1, 2012 at 5:30 PM, Cameron McInally <cameron.mcinally at nyu.edu> wrote: > Aligning the stack to 32 bytes when there are auto AVX vector variables present shouldn't necessarily break the x86-64 ABI, as long as smaller auto variables remain properly aligned. A similar approach
2015 Aug 28
2
Aligned vector spills and variably sized stack frames
----- Original Message ----- > From: "Philip Reames via llvm-dev" <llvm-dev at lists.llvm.org> > To: "llvm-dev" <llvm-dev at lists.llvm.org> > Sent: Friday, August 28, 2015 6:21:00 PM > Subject: Re: [llvm-dev] Aligned vector spills and variably sized stack frames > > On 08/28/2015 04:00 PM, Philip Reames via llvm-dev wrote: > > I've run
2015 Apr 23
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
---------------------------------------- > Date: Tue, 21 Apr 2015 09:15:02 -0700 > Subject: Re: [LLVMdev] question about alignment of structures on the stack (arm 32) > From: t.p.northover at gmail.com > To: alexey.perevalov at hotmail.com > CC: llvmdev at cs.uiuc.edu > >> I'm using MachO loader (https://github.com/LubosD/darling/). I'm trying to make it work on
2012 Mar 02
3
[LLVMdev] Stack alignment on X86 AVX seems incorrect
On Fri, Mar 2, 2012 at 11:32 AM, Evandro Menezes <emenezes at codeaurora.org> wrote: ... > Figure 3.3 on page 16 of www.x86-64.org/documentation/abi.pdf is not > normative. See foot note 7 in the same page. Figure 3.4 on page 21 > confirms that the use of a frame-pointer is optional. > > So, if one doesn't use ENTER in the prologue and uses RSP to access local >
2012 Mar 02
2
[LLVMdev] Stack alignment on X86 AVX seems incorrect
On Fri, Mar 02, 2012 at 12:18:19AM -0300, Bruno Cardoso Lopes wrote: > Hi Elena, > > On Thu, Mar 1, 2012 at 8:28 PM, Demikhovsky, Elena > <elena.demikhovsky at intel.com> wrote: > > Even if you explicitly specify –stack-alignment=16 the aligned movs are > > still generated. > > > > It is not an issue related to ABI. > > This looks like PR10841,
2006 May 16
1
[LLVMdev] Stack alignment in leaf functions
Hi, right at the moment, LLVM won't align the stack for leaf functions. So, if stack alignment is 8 bytes, and leaf function has 1 variable of 4 bytes, the size of frame will be computed as 4 bytes, making stack pointer inside function non-aligned. I've mentioned this before: http://lists.cs.uiuc.edu/pipermail/llvmdev/2005-March/003701.html but did not pursue the issue back then.
2015 Apr 21
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
Hello Tim, thanks for response ---------------------------------------- > Date: Mon, 20 Apr 2015 11:45:03 -0700 > Subject: Re: [LLVMdev] question about alignment of structures on the stack (arm 32) > From: t.p.northover at gmail.com > To: alexey.perevalov at hotmail.com > CC: llvmdev at cs.uiuc.edu > > On 20 April 2015 at 11:09, Alexey Perevalov > <alexey.perevalov at
2012 Mar 02
0
[LLVMdev] Stack alignment on X86 AVX seems incorrect
On Fri, Mar 02, 2012 at 11:58:29AM -0500, Cameron McInally wrote: > On Fri, Mar 2, 2012 at 11:32 AM, Evandro Menezes <emenezes at codeaurora.org> > wrote: > ... > > Figure 3.3 on page 16 of www.x86-64.org/documentation/abi.pdf is not > > normative. See foot note 7 in the same page. Figure 3.4 on page 21 > > confirms that the use of a frame-pointer is optional.
2015 Apr 20
2
[LLVMdev] question about alignment of structures on the stack (arm 32)
Dear community, I faced with code which was generated by llvm, assembly instructions of that code is relying on 8-bytes alignment for structures on the stack. The part of Objective C code is following: -(void)getCharacters:(unichar *)unicode {     NSRange range;     range.location = 0;     range.length = [self length];     printf("%p, %p\n", &range.location, &range.length); And
2012 Mar 01
4
[LLVMdev] Stack alignment on X86 AVX seems incorrect
On Thu, Mar 1, 2012 at 4:29 PM, Evandro Menezes <emenezes at codeaurora.org>wrote: ... > Aligning the stack to 32 bytes when there are auto AVX vector variables > present shouldn't necessarily break the x86-64 ABI, as long as smaller auto > variables remain properly aligned. A similar approach was taken for i386 > in GCC in order to support SSE vectors. > > Perhaps
2009 May 01
1
[LLVMdev] Stack alignment in JIT compiled code
Hello, Andrew > That's right.  If you want to be able to call any code produced by gcc, > you have to preserve 16-alignment.  gcc-generated code does not realign > the stack pointer. This was for gcc < 4.4, where stack alignment handling was really messy. stack-realignment branch was merged afair into gcc 4.4 and allows automatic realignment of stack, when necessary. -- With
2012 Oct 23
4
[LLVMdev] x86 Frame Pointer with AVX
On Mon, Oct 22, 2012 at 5:49 PM, Eric Christopher <echristo at gmail.com>wrote: > > In trunk, the frame pointer is always set up when an AVX register is > used in > > a function. This is done in case 32-byte spill code is later introduced > into > > the function and hence dynamic stack realignment is needed. Needless to > say, > > it's a big hammer. This
2012 Mar 02
0
[LLVMdev] Stack alignment on X86 AVX seems incorrect
Two responses inline... My current thinking is that an emergency spill slot could be set aside to > hold the original, ABI conforming, frame pointer. Not an ideal solution, > but in my situation where I must cover any code a user throws at me, > breaking the ABI and playing with the stack is preferred. > > Ah, this is not a good idea. I examined this a while back. The issue is that