similar to: [LLVMdev] LLC ARM Backend maintainer

On Oct 13, 2011, at 10:33 AM, Raja Venkateswaran wrote: > I think we need a group of maintainers rather than a single maintainer given the spectrum of ARM targets/ISAs/platforms required to support and the amount of people/system resources required. I & my team plan to actively participate in the bug-fixing process during the release cycle. If we can divide the bugs among the maintainers

I see, so perhaps the LLVM ARM Backend is in need of a method of organizing volunteer qualifiers, as releases near? Has this generally been organized via this mailing list? Joe Joe Abbey Software Architect Arxan Technologies, Inc. 1305 Cumberland Ave, Ste 215 West Lafayette, IN 47906 W: 765-889-4756 x2 C: 765-464-9893 jabbey at arxan.com<mailto:jabbey at arxan.com>

Well how about as a strawman... taking some options from http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores and http://en.wikipedia.org/wiki/List_of_applications_of_ARM_cores LLVM Supports: ARMv4T -> ARM7TDMI ARMv5TE -> ARM926EJ-S -> XScale ARMv6 -> ARM1136J(F)-S ARMv6ZK -> ARM1176JZ(F)-S ARMv7A -> Cortex-A8 Cortex-A9 ARMv7M -> Cortex-M3

Hi Anshu, I got a testbench which fails (and segfaults) consistently with an environment (gcc + os) conveniently preserved in a virtual machine. I will confirm that it is gone there and report. Thanks for the fix :) Carlos 2012/12/10 Anshuman Dasgupta <adasgupt at codeaurora.org> > Carlos, > > I committed a fix in r169783. Thanks for catching this. > > However, I could

Carlos, I committed a fix in r169783. Thanks for catching this. However, I could not reproduce an invalid read or a segfault even with fadd.ll. Is there a test case you can check in that reproduces this bug? Even if the segfault occurs intermittently, that's better than no test case at all. Thanks -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by

Hi Anshu, the "test case" I referred to requires the compilation of our whole back-end. It segdaults when using gcc-4.4.3 under Ubuntu 10.04, with other combinations I have tested it still happens (before your patch) but is not noticeable unless using gdb. I have tried making valgrind catch it but no success... so I guess the only way to *see* it is using the debugger. I remember

Hi Anshu, Would there be any interest in extending this algorithm to handling more extensive models, such as VLIW scheduling based on FU's and bundle space... ie handle multiple stages ? I might do it and commit, if there is acceptance and guidance... Jonas ________________________________ From: Anshuman Dasgupta [mailto:adasgupt at codeaurora.org] Sent: Tuesday, February 12, 2013 4:47 PM

Hi Anshu, no, I did not fill a bug report. It is not so easy to make the code fail noticeably; during Hexagon CodeGen tests it happens silently and tests pass. I am working on another VLIW backend which uses DFAPacketizer and compiling llvm with gcc-4.4 makes it segfault, but with gcc-4.7 the bug gets hidden again (it still happens, but values after DFAStateEntryTable in memory are such that

Hi again, I can confirm r169783 fixes the problem. My testbench segfaulted in r169782 but works after your commit. We can close the issue. Thanks, Carlos 2012/12/11 Carlos Sánchez de La Lama <csanchezdll at gmail.com> > Hi Anshu, > > I got a testbench which fails (and segfaults) consistently with an > environment (gcc + os) conveniently preserved in a virtual machine. I

Great! Can you please check in that test case or better still, a reduced version of that test. Thanks -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation On 12/11/2012 5:47 AM, Carlos Sánchez de La Lama wrote: > Hi again, > > I can confirm r169783 fixes the problem. My testbench segfaulted in > r169782 but works after your

I think we need a group of maintainers rather than a single maintainer given the spectrum of ARM targets/ISAs/platforms required to support and the amount of people/system resources required. I & my team plan to actively participate in the bug-fixing process during the release cycle. If we can divide the bugs among the maintainers and establish a requirement that all open ARM bugs must be

Hi Jonas, > It is interesting to find this in the ARM backend, considering your answer. The ARM backend doesn't use the DFA packetizer. It's only used by Hexagon. At this point, there is no plan to address thisin the DFA packetizer since none of the supported targets needthe functionality. Thanks -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,

Committed in r159281. -Anshu On 6/26/2012 3:04 AM, Ivan Llopard wrote: > Hi Anshu, > > I don't have commit access. It applies correctly on trunk, I've just > checked it. Could you please commit it? > > Ivan > > On 26/06/2012 04:44, adasgupt at codeaurora.org wrote: >> Hi Ivan, >> >> Sorry, I should have been more explicit in my last email. The

Hi Anshu, I don't have commit access. It applies correctly on trunk, I've just checked it. Could you please commit it? Ivan On 26/06/2012 04:44, adasgupt at codeaurora.org wrote: > Hi Ivan, > > Sorry, I should have been more explicit in my last email. The patch looks > good to me. Please check that it applies on trunk and go ahead and commit. > > Thanks > -Anshu

I missed last 2 commits made by Alexey. Following his advices, I updated the patch. It should be ok now. Ivan On 27/06/2012 21:42, Anshuman Dasgupta wrote: > Committed in r159281. > > -Anshu > > > On 6/26/2012 3:04 AM, Ivan Llopard wrote: >> Hi Anshu, >> >> I don't have commit access. It applies correctly on trunk, I've just >> checked it.

Chris, I'd like to take code ownership of the Hexagon backend. Thanks -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

Hi Ivan, Sorry, I should have been more explicit in my last email. The patch looks good to me. Please check that it applies on trunk and go ahead and commit. Thanks -Anshu > Hi Anshu, > > Just in case you have forgotten this thread ;-). Is this patch ok to > commit or does it not apply to trunk properly ? > I can fix it if that's the problem. > > Ivan > > On

Great summary Kristof ! I do not know how frequent is the addition of a new benchmark, but this would disrupt the compile time measurement. On the other hand, we just want to see a (hopefully negative) slope and ignore steps due to new benchmark being added. Cheers, -- Arnaud On Wed, Nov 13, 2013 at 2:14 PM, Kristof Beyls <kristof.beyls at arm.com>wrote: > Hi, > > > >

I'm the code owner of LLVM codegen and targets. I'm also the one of main developers on the original ARM target. That means, I would make the decisions on major development on ARM target if there are decisions to be made. But my role is very different from what people are looking for in this thread. To properly qualify a target like ARM which are supported on many different CPUs and

Hi Anshu, Just in case you have forgotten this thread ;-). Is this patch ok to commit or does it not apply to trunk properly ? I can fix it if that's the problem. Ivan On 20/06/2012 19:33, Anshuman Dasgupta wrote: > > > Thanks for reviewing this. I added a top comment for AddInsnClass > and I fixed the violation of column numbers. > > Great. Looks good to me. > >