Displaying 20 results from an estimated 20000 matches similar to: "[LLVMdev] forward branching"
2013 Feb 17
2
[LLVMdev] pseudo lowering
On Feb 17, 2013, at 1:01 PM, Reed Kotler <rkotler at mips.com> wrote:
> On 02/17/2013 12:48 PM, Andrew Trick wrote:
>> On Feb 16, 2013, at 1:31 PM, Cameron Zwarich <zwarich at apple.com> wrote:
>>
>>> That's exactly the right place.
>> Really? You don't want the expansion to be optimized? You want to specify a machine model for the pseudo's
2013 Nov 12
1
[LLVMdev] asm parser functionality
Right now inline assembler just passes through to the assembler if there
is no direct object emitter.
If there is a direct object emitter, it gets processed in Asm parser and
MC instructions are produced.
I propose that the initial parsing happen very early and the inline
assembly code be replaced with a sequence of MachineInstructions in the
basic block where it occurs.
Then code like
2013 Feb 17
0
[LLVMdev] pseudo lowering
On 02/17/2013 01:08 PM, Andrew Trick wrote:
>
> On Feb 17, 2013, at 1:01 PM, Reed Kotler <rkotler at mips.com
> <mailto:rkotler at mips.com>> wrote:
>
>> On 02/17/2013 12:48 PM, Andrew Trick wrote:
>>> On Feb 16, 2013, at 1:31 PM, Cameron Zwarich<zwarich at apple.com> wrote:
>>>
>>>> That's exactly the right place.
2014 Jan 29
3
[LLVMdev] making emitInlineAsm protected
On 01/28/2014 06:29 PM, Eric Christopher wrote:
> Uhhhh...
>
> -eric
>
> On Tue, Jan 28, 2014 at 4:56 PM, reed kotler <rkotler at mips.com> wrote:
>> I would like to make the following member of AsmPrinter be protected
>>
>>
>> void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0,
>> InlineAsm::AsmDialect
2013 Feb 17
0
[LLVMdev] pseudo lowering
On 02/17/2013 12:48 PM, Andrew Trick wrote:
> On Feb 16, 2013, at 1:31 PM, Cameron Zwarich <zwarich at apple.com> wrote:
>
>> That's exactly the right place.
> Really? You don't want the expansion to be optimized? You want to specify a machine model for the pseudo's as if they're real instructions? You don't want to schedule or register allocate the real
2014 Jan 29
6
[LLVMdev] making emitInlineAsm protected
I would like to make the following member of AsmPrinter be protected
void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0,
InlineAsm::AsmDialect AsmDialect =
InlineAsm::AD_ATT) const;
I have some stubs that I want to emit in MipsAsmParser .
Are there any objections to doing this?
Reed
2013 Feb 17
4
[LLVMdev] pseudo lowering
On Feb 16, 2013, at 1:31 PM, Cameron Zwarich <zwarich at apple.com> wrote:
> That's exactly the right place.
Really? You don't want the expansion to be optimized? You want to specify a machine model for the pseudo's as if they're real instructions? You don't want to schedule or register allocate the real instructions?
-Andy
> On Feb 16, 2013, at 1:08 PM, Reed
2013 Feb 17
0
[LLVMdev] keeping instructions in order and hidden dependencies
Sounds like bundles will be the simplest to start with though I suppose
I could just lower the pseudos after scheduling is done; for now.
Bundles will prevent things from being able to be scheduled in more
creative ways but for that I need to think more about the problem.
So I can just create a bundle, insert instructions in it, and all will
work more or less?
I'm trying to take the next
2014 Jan 29
3
[LLVMdev] making emitInlineAsm protected
On 01/29/2014 01:48 PM, Rafael EspĂndola wrote:
>> So how do I create stubs?
>>
>> I have specific function stubs that I want to create.
>>
>> There is no direct object emitter for mips16 at this time.
> Print it like any other instruction?
>
> Cheers,
> Rafael
I'd like to just check my code in and then you can look at it in it's
totality and see
2013 Apr 19
1
[LLVMdev] funny llvm bug
On Fri, Apr 19, 2013 at 1:50 PM, Reed Kotler <rkotler at mips.com> wrote:
> On 04/19/2013 12:43 PM, Joerg Sonnenberger wrote:
>>
>> On Fri, Apr 19, 2013 at 09:47:28AM -0700, reed kotler wrote:
>>>
>>> The clean solution is probably to add two additional function
>>> attributes to cover these additional pieces, namely "ax" and
>>>
2013 Feb 17
4
[LLVMdev] keeping instructions in order and hidden dependencies
You are trying to do a few different things here, and a uniform solution may not work for all of them. For a fixed instruction sequence, e.g. a special kind of move-and-branch sequence used for tail calls, you probably want a pseudo. If you are trying to combine arbitrary instructions together, e.g. Thumb IT blocks, you probably want to use bundles, even if the sequences are a fixed length. I
2014 Feb 25
2
[LLVMdev] configure with clang vs gcc
I see what my problem is here....
I'll continue to move further.
Seems like Richards fix is still okay.
On 02/25/2014 02:42 PM, Eric Christopher wrote:
> On Tue, Feb 25, 2014 at 2:41 PM, reed kotler <rkotler at mips.com> wrote:
>> On 02/25/2014 02:38 PM, Eric Christopher wrote:
>>> On Tue, Feb 25, 2014 at 2:32 PM, reed kotler <rkotler at mips.com> wrote:
2014 Feb 25
3
[LLVMdev] configure with clang vs gcc
On 02/25/2014 02:38 PM, Eric Christopher wrote:
> On Tue, Feb 25, 2014 at 2:32 PM, reed kotler <rkotler at mips.com> wrote:
>> On 02/25/2014 09:30 AM, Richard Sandiford wrote:
>>> reed kotler <rkotler at mips.com> writes:
>>>> On 02/24/2014 04:42 PM, Eric Christopher wrote:
>>>>> On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at
2014 Feb 25
3
[LLVMdev] configure with clang vs gcc
On 02/24/2014 04:42 PM, Eric Christopher wrote:
> On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at mips.com> wrote:
>> I need to leave soon and will take a look in the morning.
>>
>> I did look at the autoconf input files configure.ac
>>
>> There is a disable-zlib but not a disable-valgrind, even though it seems
>> like there used to be.
2014 Jun 11
2
[LLVMdev] constraining two virtual registers to be the same physical register
On 06/10/2014 05:51 PM, Pete Cooper wrote:
> Hi Reed
>
> You can do this on the instruction itself by telling it 2 operands
> must be the same register. For example, from X86:
>
> let Constraints = "$src1 = $dst" in
> defm INSERTPS : SS41I_insertf32<0x21, "insertps">;
>
> Thanks,
Hi Pete,
Sorry.
I should have been more specific.
I'm
2014 Sep 30
2
[LLVMdev] ptrtoint
If you can't make an executable test from C or C++ code then how do you
know something works.
Just by examination of the .s?
On 09/30/2014 03:18 PM, Reed Kotler wrote:
> If I wanted to call this function that they generated by hand, from C or
> C+ code, how would that be done?
>
> if have seen cases where a real boolean gets generated but it was
> something fairly involved.
2012 Jun 28
2
[LLVMdev] recursing llvm
Okay. Cool.
So do you bootrstrap and verify as part of the usual testing?
Do the nightly scripts do this?
Reed
On 06/28/2012 11:08 AM, Eric Christopher wrote:
> On Jun 27, 2012, at 10:48 PM, Reed Kotler<rkotler at mips.com> wrote:
>
>> On 06/27/2012 05:00 PM, Eric Christopher wrote:
>>> On Jun 19, 2012, at 5:24 PM, reed kotler<rkotler at mips.com> wrote:
2013 Sep 18
2
[LLVMdev] forcing two instructions to be together
I used the A9 schedule as an example:
http://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td
The documentation could use more clarity, but this is how I was able to do it to always get two specific instructions to be scheduled together.
________________________________________
From: reed kotler [rkotler at mips.com]
Sent: Tuesday, September 17, 2013 8:54 PM
To: Micah Villmow
2012 Jun 05
3
[LLVMdev] technical debt
Well, differences of opinion is what makes horse races.
Reed
On 06/04/2012 04:57 PM, Daniel Berlin wrote:
> On Mon, Jun 4, 2012 at 7:53 PM, reed kotler<rkotler at mips.com> wrote:
>> On 06/04/2012 03:25 PM, Daniel Berlin wrote:
>>> I'm pretty sure neither llvm nor clang have any technical debt at all.
>>>
>>> On Mon, Jun 4, 2012 at 5:18 PM, reed
2012 Jun 05
0
[LLVMdev] technical debt
FWIW, I'm putting together (hopefully to be done by the end of this
weekend) a substantial refactoring of the TableGen backend API along with
shiny new documentation (reStructuredText with sphinx) of all of TableGen,
including documentation about how to write backends and---depending on how
adventurous I get---a more detailed coverage of the syntax.
Also, Reed, in your TableGen talk, IIRC,