similar to: [LLVMdev] Support for PPC 440/450

On Oct 5, 2011, at 8:22 AM, Hal Finkel wrote: > I've been working on adding support for the PPC 440/450 "embedded" cores > to the PowerPC backend. These are used on IBM's Blue Gene L and P > supercomputers, but are also used in other environments (like on the > Xilinx Virtex-5). Here is my first patch. I'm new to LLVM, and so I > apologize if this is the wrong

Hello, I'm working on extending the current PowerPC backend to handle a vector instruction set for floating-point operations (IBM's double-hummer instruction set used on the BG/P supercomputers). In this instruction set, each of the existing floating-point registers becomes the first of two vector elements. I am having trouble optimizing the BUILD_VECTOR operation for the case where I am

Hello! I have a question about Instructions and MnemonicAliases. Let's say I have an instruction (an instruction prefix actually, in the X86 backend), and the instruction has 'Defs' and 'Uses' defined for it. If I define a MnemonicAlias from that instruction prefix to another, then do the 'Defs' and 'Uses' get "applied" to the alias as well? In

I am new to the LLVM backends, I am wondering how instruction selection is done in LLVM backends, I looked at the .td files in Target/X86, they all seem to be small and do not deal with common X86 instructions, i.e. mov, push, pop, etc. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

Dear all, I have the following problem with the uniroot function. I want to find roots for the fucntion "Fp2" which is defined as below. Fz <- function(z){0.8*pnorm(z)+p1*pnorm(z-u1)+(0.2-p1)*pnorm(z-u2)} Fp <- function(t){(1-Fz(abs(qnorm(1-(t/2)))))+(Fz(-abs(qnorm(1-(t/2)))))} Fp2 <- function(t) {Fp(t)-0.8*t/alpha} th <- uniroot(Fp2, lower =0, upper =1,

Hi, I need to subset different levels of vector in a dataset to create a new dataframe that contains only these. These observations are not numerical, so I can't use the subset() function (at least this is the response I get from R). Suppose the dataframe looks like this:   ParticipID    ERP   Electrode 1         s1  0.0370       FP1 2         s2 35.0654       FP2 3         s3

Hi, I'm using py-rrdtool 0.2.1 with rrdtool 1.3.0 under 7.0-STABLE, and there's a couple of things about this new version of rrdtool that hurt performance under FreeBSD, but apparently help on whatever they tested on. For every update, the database file is opened, mapped into memory, madvise() is called, contents are modified, msync() is called, and the file is unmapped and closed:

Short answer: No, that's not how assembly aliases work. A MnemonicAlias is entirely a construct of the assembly parser. By the time anything that matches via the alias gets to parts of the toolchain that know anything about uses and defs, it's as-if there only ever were one instruction definition at all. -Jim On Mar 25, 2013, at 10:08 AM, Muhammad Tauqir Ahmad <muhammad.t.ahmad at

Hi , For reasons I will not go in to does anyone know if you can convert a RedHat RHEL4 box to CentOS 4 ? I am hoping this possible with our re installing . If it if what do I need to do to get the system to run yum instead of the RedHat updates. Thanks Arun -------------- next part -------------- An HTML attachment was scrubbed... URL:

>From today's maillog: maillog:Dec 28 09:29:40 aurora dovecot: IMAP(doug): msync() failed with index file /home/doug/Maildir/.projects.job591/dovecot.index: Invalid argument maillog:Dec 28 09:30:21 aurora dovecot: IMAP(doug): msync() failed with index file /home/doug/Maildir/dovecot.index: Invalid argument maillog:Dec 28 09:30:22 aurora dovecot: IMAP(doug): msync() failed with index file

On Oct 21, 2011, at 12:15 AM, James Molloy wrote: > Hi Andy, > > Could you describe how this would be done? In the current ARM itineraries > (say C-A9 for example), the superscalar issue stage is modelled as taking 1 > cycle. If it were to take 2 cycles instead, as far as I can tell the hazard > analyser would stall because both FU's would be acquired. > > I would

I want to write a pattern that looks something like this: def : Pat<(unalignedstore (v2f64 VR128:$src), addr:$dst), (MOVSDmr ADD64ri8(addr:$dst, imm:8), ( SHUFPDrri (VR128:$src, (MOVSDmr addr:$dst, FR64:$src))), imm:3) So I want to convert an unaligned vector store to a scalar store, a shuffle and a scalar store. There are several question I have: - Is the imm:3 syntax

Greetings folks! In working on a new optimization pass (splitting cold regions into separate functions based on branch probabilities) I've run into some limitations of the current pass manager infrastructure. After chatting about this with Nick, it seems that there are some pretty systematic weaknesses of the current design and implementation (but not with the fundamental concepts or

Hi Chandler, this seems sound to me. For example, consider running function passes. Currently it works like this: if you schedule two function passes in succession, FP1 and FP2, then for each function F, FP1 is run on F then FP2 is run on F. In your new scheme, if you schedule FP1 followed by FP2, then each will act as a module pass and thus: for each function F, FP1 is run on F. Once this is

Hi rsync devs and users, I want to use rsync to synchronize home directories on two PCs. It works fine if I start rsync after working on a host each time I leave. But instead of operating modes "host1 -> host2" and "host2 -> host1" I would like to have a mode "host1 <-> host2" to allow synchronizing at any time -> Scenario: - on host1 files A,B have

I am running my code in a loop and it does not work but when I run it outside the loop I get the values I want. n <- 1000; # Sample size fitglm <- function(sigma,tau){ x <- rnorm(n,0,sigma) intercept <- 0 beta <- 0 ystar <- intercept+beta*x z <- rbinom(n,1,plogis(ystar)) xerr <- x + rnorm(n,0,tau) model<-glm(z ~ xerr, family=binomial(logit))

I am trying to compile this little C-program: ================= typedef double v2f64 __attribute__((ext_vector_type(2))); int sse2_cmp_sd(v2f64, v2f64, char ) asm("llvm.x86.sse2.cmp.sd"); int main() { static int i; static float x[10]; static float y[10]; v2f64 m1; v2f64 m2; int j; i = sse2_cmp_sd(m1,m2,'z'); ========================== I expected to

I'm debugging some X86 patterns and I want to understand the debug dumps from isel better. Here's some example output: 0x391bc40: i64,ch = load 0x3922c50, 0x391b8d0, 0x38dc530 <0x39053e0:0> <sext i32> alignment=4 srcLineNum= 10 0x3922c50: <multiple use> 0x391bc40: <multiple use> 0x3856ab0: <multiple use> 0x3914520: i64 =

I'm searching for the SRPM corresponding to this installed RPM. % yum list | grep gfs2 gfs2-kmod-debuginfo.x86_64 1.92-1.1.el5_2.2 It is missing from: http://msync.centos.org/centos-5/5/os/SRPMS/ What I need from the SRPM are the patches. I'm working through some issues using the source code, and the patches in the RedHat SRPM

On Monday 17 November 2008 14:28, David Greene wrote: > I want to write a pattern that looks something like this: > > def : Pat<(unalignedstore (v2f64 VR128:$src), addr:$dst), > (MOVSDmr ADD64ri8(addr:$dst, imm:8), ( SHUFPDrri (VR128:$src, > (MOVSDmr addr:$dst, FR64:$src))), imm:3) > > So I want to convert an unaligned vector store to a scalar store, a