similar to: [LLVMdev] Memmove vs Dead Code Elimination

Hi, I get build errors when trying to build a fresh r139985. Anyone got a clue? carl at carl:~/Downloads/llvm3.0/llvm$ gcc --version gcc (Ubuntu/Linaro 4.5.2-8ubuntu4) 4.5.2 Copyright (C) 2010 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. carl at

Hi Adarsh, On 11/02/12 09:47, Adarsh Konchady wrote: > My pass in LLVM generates an IR like this > %5 = icmp eq i32 %4, 0 > %7 = or i1 %5, %5 > ;. . . > Since the 'or' instruction is actually not needed(dead code), I replaced all > occurences of %7 with %5. > Now, the 'or' instruction should get deleted. How can I call Dead Code > Elimination pass

On May 19, 2010, at 7:07 AM, o.j.sivart at gmail.com wrote: > Hi all, > > I'm interested in the impact of representing code via intrinsic functions, in contrast to via an instruction, when it comes to performing dead instruction/code elimination. As a concrete example, lets consider the simple case of the llvm.*.with.overflow.* intrinsics. > > If I have some sequence (> 1)

On May 19, 2010, at 3:13 PM, o.j.sivart at gmail.com wrote: >> >> Intrinsics should be optimized as well as instructions. In this specific case, these intrinsics should be marked readnone, which means that load/store optimization will ignore them. Dead code elimination will delete the intrinsic if it is dead etc. > > I understand that dead code elimination is able to delete

On 20/05/2010, at 3:01 AM, Chris Lattner wrote: > > On May 19, 2010, at 7:07 AM, o.j.sivart at gmail.com wrote: > >> Hi all, >> >> I'm interested in the impact of representing code via intrinsic functions, in contrast to via an instruction, when it comes to performing dead instruction/code elimination. As a concrete example, lets consider the simple case of the

On 20/05/2010, at 8:16 AM, Chris Lattner wrote: > > On May 19, 2010, at 3:13 PM, o.j.sivart at gmail.com wrote: > >>> >>> Intrinsics should be optimized as well as instructions. In this specific case, these intrinsics should be marked readnone, which means that load/store optimization will ignore them. Dead code elimination will delete the intrinsic if it is dead

Hi Duncan, The mem2reg pass did not help. Moving the alloca instructions into the entry block did the trick. One other thing I noticed is that if there was only one alloca, the dead store is eliminated. Having the second one (does not matter which of the two) prevents the elimination. Is this a bug? Thanks, Vinayak On 9/10/12 8:16 AM, Duncan Sands wrote: > Hi Vinayak, > >>

My pass in LLVM generates an IR like this %5 = icmp eq i32 %4, 0 %7 = or i1 %5, %5 ;. . . Since the 'or' instruction is actually not needed(dead code), I replaced all occurences of %7 with %5. Now, the 'or' instruction should get deleted. How can I call Dead Code Elimination pass of LLVM from my pass or is there any method to remove that 'or' instruction? Thank you.

Maybe I should say b2 should be eliminated. Since b1 and b2 are same type and b1 is not used any more after the function call, b2 can be replaced by b1. This will save an alloca. In my test, if the function is not external, b1 is eliminated. But with external function, it did not. Since the ir is generated, I cannot manually update b2 with b1. I would like the optim pass do it. On

Hi, I am working on llvm for a course, We implemented a dead code elimination algorithm, and I want to benchmark it against -dce and -adce currently included in llvm. Can someone point me to good benchmarks? I looked through some files in TestSuite, but it seems some files simply doesn't have much dead code in them. For example, the Stanford benchmark literally have no dead code in them.

I request additional review of diff: http://reviews.llvm.org/D18762 We noticed that a source of performance difference between llvm and gcc was in dead code elimination. This diff replaces ADCE with a new implementation which will remove control flow and, under option, also remove may-be-infinite loops which are dead. The patch current has "ADCE_new.h" and "ADCE_new.cpp" to

Can you give an example of a case that is missed today but catched by your pass? > On Mar 23, 2016, at 6:43 AM, David Callahan via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > I have a new variant of Aggressive Dead Code Elimination that also removes dead branching. It is designed to minimize the cost of control-dependence analysis in the common case where

Hi Peng, > Here is an llvm ir of a module. It seems that "b1" should be eliminated by dead > store elimination. But it did not. > > Could anyone explain why and how "b1" can be eliminated? > > Thanks, > -Peng > > %0 = type { [3 x [1 x i32]] } > > declare %0 @external_fcn3(i32, i32, i32, i32, [3 x [1 x i32]]*) > > define i32 @f3(i32 %a)

Hi all, I'm interested in the impact of representing code via intrinsic functions, in contrast to via an instruction, when it comes to performing dead instruction/code elimination. As a concrete example, lets consider the simple case of the llvm.*.with.overflow.* intrinsics. If I have some sequence (> 1) of llvm.*.with.overflow.* intrinsics, as in the form of: @global = global i32 0

Yeah, that was gonna be my question. If so, my view is we should just bite the bullet and start threading post dominance through the compiler. (assuming anyone wants to help. I'm tackling the memoryssa updating stuff with george ATM). On Thu, Mar 24, 2016 at 7:04 PM, Hal Finkel <hfinkel at anl.gov> wrote: > [+Danny] > > ----- Original Message ----- > > From:

David Callahan via llvm-dev <llvm-dev at lists.llvm.org> writes: > Hi, > > I have a new variant of Aggressive Dead Code Elimination that also > removes dead branching. It is designed to minimize the cost of > control-dependence analysis in the common case where almost the entire > program is live. It also can optionally remove dead but > may-be-infinite loops. > >

Here is an llvm ir of a module. It seems that "b1" should be eliminated by dead store elimination. But it did not. Could anyone explain why and how "b1" can be eliminated? Thanks, -Peng %0 = type { [3 x [1 x i32]] } declare %0 @external_fcn3(i32, i32, i32, i32, [3 x [1 x i32]]*) define i32 @f3(i32 %a) readnone { entry: %b1 = alloca [3 x [1 x i32]] %b2 = alloca [3 x

[+Danny] ----- Original Message ----- > From: "Justin Bogner via llvm-dev" <llvm-dev at lists.llvm.org> > To: "David Callahan via llvm-dev" <llvm-dev at lists.llvm.org> > Sent: Wednesday, March 23, 2016 12:36:50 PM > Subject: Re: [llvm-dev] RFC: New aggressive dead code elimination pass > > David Callahan via llvm-dev <llvm-dev at

hi, I just downloaded llvm3.0 source, and compile it with cmake+msvc2008 ,but failed. the error message was missing X86GenRegisterInfo.inc such kind of files. I can build llvm2.9 with cmake+msvc2008 well, why can't I build llvm3.0 with same method. thanks

Make most things update post-dominance info and preserve it. Our other alternative to not take up too much time seems to be invasive surgery on how BB successors/predecessors work so they are a constant time array. I say this because GCC recomputes post-dominators roughly 15-19 times per compilation, and can do it about 3-5x faster than we can. All profiling i've done basically says all our