similar to: [LLVMdev] The right option combination to compile into ARM/Thumb2 code.

Displaying 20 results from an estimated 6000 matches similar to: "[LLVMdev] The right option combination to compile into ARM/Thumb2 code."

2011 Sep 03
0
[LLVMdev] The right option combination to compile into ARM/Thumb2 code.
Hi Karel, It actually looks like the argument parser has parsed "thumb -mattr=v7,thumb2,vfp3" as the full argument to "-march=". Strange. The easiest way to get what you want is probably "-mtriple thumbv7--". v7 has Thumb2 enabled and VFPv3 (along with NEON) by default. Cheers, James ________________________________________ From: llvmdev-bounces at cs.uiuc.edu
2011 Aug 29
3
[LLVMdev] ARM issue: Trying to add an operand to a machine instr that is already done!
Hello, I've compiled today's LLVM on ARM/Linux machine and attempted to use our GHC/ARM port (which is using LLVM as a backend for generating machine code) with it but I've failed in compiling GHC alone as LLVM fails on me with following message: llc: /export/home/karel/vcs/llvm-ghc-arm/lib/CodeGen/MachineInstr.cpp:612: void llvm::MachineInstr::addOperand(const
2011 Aug 29
1
[LLVMdev] ARM issue: Trying to add an operand to a machine instr that is already done!
Hi Jim and Eric! thanks a lot for your fantastically fast reply. I'm going to update and will report tomorrow when all the building is done. Thanks! Karel On 08/29/11 11:36 PM, Jim Grosbach wrote: > Hi Karel, > > Mind trying again with current top of tree? Owen's fixed a few things today that were manifesting with that error. > > -Jim > > On Aug 29, 2011, at 2:33
2011 Aug 29
0
[LLVMdev] ARM issue: Trying to add an operand to a machine instr that is already done!
Hi Karel, Mind trying again with current top of tree? Owen's fixed a few things today that were manifesting with that error. -Jim On Aug 29, 2011, at 2:33 PM, Karel Gardas wrote: > Hello, > > I've compiled today's LLVM on ARM/Linux machine and attempted to use our GHC/ARM port (which is using LLVM as a backend for generating machine code) with it but I've failed in
2012 Aug 02
1
[LLVMdev] Question about arm thumb2 code generation
Thanks andrew for the answer. I would like to generate code for Cortex-A9 that don't use neon for fp computation but vfpv3 -d16. I've tried some combination of -mattr=+neon,-neonfp,+vfp3,+d16 but couldn't get ".fpu vfpv3-d16" directive generated in assembly file. Do you know how to make it happen ? Best Regards Seb From: Andrew Trick [mailto:atrick at apple.com] Sent:
2012 Jul 28
0
[LLVMdev] Question about arm thumb2 code generation
On Jul 27, 2012, at 9:04 AM, Sebastien DELDON-GNB <sebastien.deldon at st.com> wrote: > Hi all, > > Does llc –march=thumb –mcpu=cortex-a9 enable generation of thumb2 code for armv7 ? That's how I usually do it. Somewhere in the target description we associate a9 with -mattr=+thumb2. There are plenty of other ways to get the same result, and it's all very confusing and
2012 Jul 27
2
[LLVMdev] Question about arm thumb2 code generation
Hi all, Does llc -march=thumb -mcpu=cortex-a9 enable generation of thumb2 code for armv7 ? Best Regards Seb -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120727/da758ea0/attachment.html>
2011 Jun 17
2
[LLVMdev] ARM support status (GHC/ARM new calling convention)
Hello Cameron, thanks a lot for your fast answer, which just makes me curious if making ARM tailcalls on par with x86 in the future is on some of the development plans already? If not, then what do you think is the complexity of such work? Thanks! Karel On 06/17/11 10:41 PM, Cameron Zwarich wrote: > They work pretty well now, at least on Thumb2 / Darwin. It is still fairly conservative
2011 Jun 17
0
[LLVMdev] ARM support status (GHC/ARM new calling convention)
I don't know if GuaranteedTailCallOpt is in anyone's plans. It might be a good idea to implement some time. I am not sure what GHC's exact needs are, though. Cameron On Jun 17, 2011, at 1:49 PM, Karel Gardas wrote: > > Hello Cameron, > > thanks a lot for your fast answer, which just makes me curious if making ARM tailcalls on par with x86 in the future is on some of
2011 Jun 17
0
[LLVMdev] ARM support status (GHC/ARM new calling convention)
They work pretty well now, at least on Thumb2 / Darwin. It is still fairly conservative about when to use tail calls, and doesn't support GuaranteedTailCallOpt, which might be necessary for GHC. Cameron On Jun 17, 2011, at 1:31 PM, Karel Gardas wrote: > > John, > > I've moved with patches to HEAD and unfortunately the comments about > disabling tailcalls do not go
2011 Jun 17
2
[LLVMdev] ARM support status (GHC/ARM new calling convention)
John, I've moved with patches to HEAD and unfortunately the comments about disabling tailcalls do not go away with this update. Please see ARMTargetLowering::LowerCall in lib/Target/ARM/ARMISelLowering.cpp line 1208 and later. It looks like man can use -arm-tail-calls, but one never knows how good it is since the comment tells it clearly: // Temporarily disable tail calls so things
2014 Jun 23
2
[LLVMdev] VFP3
I am not using llvm tools, but sources and directly calling into relevant LLVM classes and methods. Thanks, Daman On 23/06/14 4:11 pm, "Amara Emerson" <amara.emerson at gmail.com> wrote: >Hi Damanjit, > >I assume you're trying to use the tools like llvm-mc, in which case >you can use the -mattr=+vfpv3 flag to enable it. This applies to other >subtarget
2010 Jan 11
2
[LLVMdev] Setting TARGET_LLCFLAGS in the environment
Weird issue beyond my make-fu: When running the test-suite, this works fine: make TARGET_LLCFLAGS='-mcpu=cortex-a8 -mattr=+thumb2' TEST=nightly report But this fails: export TARGET_LLCFLAGS='-mcpu=cortex-a8 -mattr=+thumb2' make TEST=nightly report It looks like the following line from Makefile.rules is executed multiple times: TARGET_LLCFLAGS += -relocation-model=pic
2011 May 27
1
[LLVMdev] Question about ARM/vfp/NEON code generation
I have a code generation question for ARM with VFP and NEON. I am generating code for the following function as a test: void FloatingPointTest(float f1, float f2, float f3) { float f4 = f1 * f2; if (f4 > f3) printf("%f\n",f2); else printf("%f\n",f3); } I have tried compiling with: 1. -mfloat-abi=softfp and -mfpu=neon 2.
2014 Jun 23
2
[LLVMdev] VFP3
How can I ensure use of VFP3 via LLVM target options? I am currently using thumbv7-windows-msvc as the target triple and default set of llvm::TargetOptions. Thanks, Daman -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140623/bdf36cce/attachment.html>
2016 Oct 26
1
Segfault in llc 3.8.0 building GHC
I found a fix! The first hunk of https://reviews.llvm.org/D17533 (lib/CodeGen/TargetFrameLoweringImpl.cpp) on top of 3.8.1 does the trick. Does llvm do patch releases of old versions? Davide Italiano <davide at freebsd.org> writes: > On Fri, Oct 21, 2016 at 6:19 AM, Shea Levy via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> Hi all, >> >> I'm hitting
2010 Jan 12
0
[LLVMdev] Setting TARGET_LLCFLAGS in the environment
On Jan 11, 2010, at 3:50 PM, Jakob Stoklund Olesen wrote: > Weird issue beyond my make-fu: > > When running the test-suite, this works fine: > > make TARGET_LLCFLAGS='-mcpu=cortex-a8 -mattr=+thumb2' TEST=nightly report > > But this fails: > > export TARGET_LLCFLAGS='-mcpu=cortex-a8 -mattr=+thumb2' > make TEST=nightly report > > It looks
2016 Oct 21
3
Segfault in llc 3.8.0 building GHC
Hi all, I'm hitting a segfault in llc when trying to build GHC: http://sprunge.us/ZVGB. What is the best way to debug this? I'm able to bump to 3.8.1 if needed, but GHC tends to break when updating major versions due to IR incompatibilities. Thanks, Shea -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size:
2011 Jul 03
9
[LLVMdev] LLVM on ARM testing.
Hello, I asked here for kind of reference GCC version which LLVM development team is using for *native* testing on ARM hardware. (no cross compilation!) last week or so. I've been curious myself how the situation looks and so I tested LLVM 2.9 as a reference point and LLVM HEAD as of June 29 on ARMv7 (two boards with two different Ubuntu versions) compiled by GCC 4.3.4, 4.4.1, 4.4.5,
2011 Jun 24
2
[LLVMdev] Infinite loop in llc on ARMv7 (LLVM HEAD from June 17)
On 06/24/11 06:53 PM, Eli Friedman wrote: > On Fri, Jun 24, 2011 at 9:12 AM, Karel Gardas<karel.gardas at centrum.cz> wrote: >> My question is if it is a known bug or unknown in which case where to >> report it and if also include compiled *.bc file or not. > > Haven't seen it before... see > http://llvm.org/docs/HowToSubmitABug.html , and please do include the