similar to: [LLVMdev] A pass to minimize instruction bitwidth?

Hi, LLVMers, has someone implemented bitwidth analysis for LLVM? I was looking for something similar to the bitwise compiler described in "Bidwidth analysis with application to silicon compilation, by Mark Stephenson, Jonathan Babb and Saman Amarasinghe" e.g.: http://portal.acm.org/citation.cfm?id=349299.349317 all the best, Fernando

We have a bitwidth analysis that can be downloaded. It is not in LLVM. There should be a link in the paper: http://www.cs.utah.edu/~regehr/papers/pldi075-cooprider.pdf John Regehr

Hello, I am wondering if there is any way to figure out bitwidth of Machine Instructions. I see that ValueType information is available for nodes of DAG, but I couldn't find similar info for Machine Instructions. I particularly need this information for x86 target. I appreciate your help and comments in this regard. Thank you, Babak

On Fri, 8 Jun 2007, Babak Salamat wrote: > I am wondering if there is any way to figure out bitwidth of Machine > Instructions. I see that ValueType information is available for nodes > of DAG, but I couldn't find similar info for Machine Instructions. I > particularly need this information for x86 target. > I appreciate your help and comments in this regard. Do you mean the

Dear LLVM community, I would like to contribute to LLVM in the Google Summer of Code project. My proposal is listed below. Please let me know your comments. Adding Range Analysis to LLVM Abstract The objective of this work is patch our implementation of range analysis into LLVM. I have a running implementation of range analysis in LLVM, but it is not currently part of the main distribution. I

On Wed, Mar 23, 2011 at 6:24 PM, John Criswell <criswell at illinois.edu> wrote: > > > On 3/23/11 8:06 AM, Douglas do Couto Teixeira wrote: > > > > the execution of a program. Thus, for each integer variable, a range > > analysis determines its lower and upper limits. A very simple range analysis > > > would, for instance, map each variable to the limits

I've actually got an implementation of this as an arbitrary precision integer extension that I've written up an RFC for (but not submitted). Below is my copy/pasted RFC (again, not reviewed, but I DO have an implementation of it that I need to prepare for review). I suspect my implementation will do what you need out of it. Its actually more significant than just adding a normal

Dear Douglas, Comments below. On 3/23/11 8:06 AM, Douglas do Couto Teixeira wrote: > Dear LLVM community, > > I would like to contribute to LLVM in the Google Summer of Code > project. My proposal is listed below. Please let me know your comments. > > > Adding Range Analysis to LLVM > > > > Abstract > > The objective of this work is patch our

Hi All, I need to parse data from a file, example shown below. The first two lines can be skipped, the third line contains the column names. The next 13 lines can be skipped. The next line "1991" is a year value, with the following 13 values data for that year. The file then repeats this format with (year, 13 lines of data for that year). I would ideally like to end up with an

Dear John, thanks for pointing it to me. I just downloaded and installed CIL. However, I am getting an error when I run "make check", or when I try to compile the blink application, and I am sending you the error notice below. In any case, do you think it is possible to get some sort of 'dump' of the target C program with some bitwidth information, once I get your

Hi! I'm a student who would like to participate on Google SOC for LLVM, and was thinking about what project to pick. I saw on the "Open projects" page that Value Range Propagation is not implemented and thought about doing it, based on a paper by Patterson (it's also used by GCC). But then I saw that last year someone did a Range Analysis pass that seems to do pretty much the

>> Would there be any interest/opposition to extending the set of simple >> integer types in MVT to include the missing multiples of 8 (up to 64 >> bits)? That is: i24, i40, i48, i56? By the way, the integer type legalization logic should probably go like this: let T be an integer type. (1) If T is legal, do nothing. (2) If there is a legal integer type which is bigger (in

Hi, Andrey, sorry for the delay: I made a page with the code available for download: http://homepages.dcc.ufmg.br/~douglas/projects/RangeAnalysis/RangeAnalysis.html Feel free to get it, and if you need some help, I will be happy to tell you how to set the analysis up, in case the explanation in the page is not good. I also have a report describing the implementation here: (

On Jun 8, 2007, at 10:05 AM, Chris Lattner wrote: > On Fri, 8 Jun 2007, Babak Salamat wrote: >> I am wondering if there is any way to figure out bitwidth of Machine >> Instructions. I see that ValueType information is available for nodes >> of DAG, but I couldn't find similar info for Machine Instructions. I >> particularly need this information for x86 target.

Hi all, I'm experimenting with the Interpreter and all look good so far :) Unfortunately when I play with the visitBinartOperator() method I have the following assertion error: Support/APInt.cpp:233: llvm::APInt llvm::APInt::operator*(const llvm::APInt &) const: Assertion `BitWidth == RHS.BitWidth && "Bit widths must be the same"' failed. I have recompiled llvm and

On Saturday, December 05, 2009 7:34 AM, Duncan Sands wrote, > > >> Would there be any interest/opposition to extending the > set of simple > >> integer types in MVT to include the missing multiples of 8 > (up to 64 > >> bits)? That is: i24, i40, i48, i56? > > By the way, the integer type legalization logic should > probably go like > this: let

Hi Douglas, On 21.02.2011 20:27, Douglas do Couto Teixeira wrote: > My work is not part of the LLVM mainline yet. But I would be happy to > contribute with the code of my range analysis implementation if it can help > you in something else. We were thinking of adding VRP to LLVM too, though we were mostly interested in Patterson's approach (i.e. not connected with SSI form). It

Grr... ---------- Forwarded message ---------- From: OvermindDL1 <overminddl1 at gmail.com> Date: Sat, Dec 5, 2009 at 5:58 PM Subject: Re: [LLVMdev] Adding multiples-of-8 integer types to MVT To: Duncan Sands <duncan.sands at math.u-psud.fr> On Sat, Dec 5, 2009 at 5:33 AM, Duncan Sands <duncan.sands at math.u-psud.fr> wrote: >>> Would there be any interest/opposition

Hi Ken, > What would do you think of modifying case (3) slightly as follows? well, that special cases the smallest legal type, which might not be a good idea. Imagine that i10 is legal, and also i32. Is it better to turn i40 into four lots of i10 or two lots of i32 with a promotion? Expansion is expensive, so two lots of i32 would be best. I suggest the following scheme: (3) Suppose T is

For example, truncating store of an i32 to i6. My assumption was that this should write the low six bits of the i32 to somewhere in memory. Should the top 24 bits of a corresponding 32 bit region of memory be unchanged, zero, undefined? Should the two bits that would round the i6 up to a byte be preserved, zero, undefined? I can't write six bits directly so am trying to determine what set