similar to: [LLVMdev] Dead node removal in DAGCombiner

Displaying 20 results from an estimated 200 matches similar to: "[LLVMdev] Dead node removal in DAGCombiner"

2011 Aug 26
0
[LLVMdev] Dead node removal in DAGCombiner
Hi Akira, > Is this piece of code in DAGCombiner::visitLOAD removing a dead node? > > 06155 if (N->use_empty()) { > 06156 removeFromWorkList(N); > 06157 DAG.DeleteNode(N); > 06158 } yes. > If it is, is there a reason it doesn't push its operands to the work > list as done in line 974-975? > > 00970 // If N has no uses,
2011 Aug 27
3
[LLVMdev] OpenCL Backend
Hi, as you come to speak of it, i have implemented an OpenCL-Backend for LLVM as part of my bachelor thesis (and for GLSlang as well, see http://www.cdl.uni-saarland.de/publications/theses/moll_bsc.pdf ). However, the code is currently unreleased. But that could be arranged, if you are interested in using it. Regards, Simon Am Freitag, den 26.08.2011, 20:11 -0500 schrieb llvmdev-request at
2010 Oct 02
1
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
Hi, >> DAGCombiner::visitBRCOND() has code: >> >> SDValue N1 = N->getOperand(1); >> SDValue N2 = N->getOperand(2); >> >> ... >> >> SDNode *Trunc = 0; >> if (N1.getOpcode() == ISD::TRUNCATE&& N1.hasOneUse()) { >> // Look past truncate. >> Trunc = N1.getNode(); >> N1 = N1.getOperand(0);
2011 Oct 07
2
[LLVMdev] MIPS 32bit code generation
Hi, I noticed one class in MipsInstrFormats.td:L46 -> Class MipsPseudo. I wonder whether I can use this. If does, I wonder what would be the right way to use. Thanks, On Thu, Oct 6, 2011 at 11:29 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: > Do you want to replace > > lui $2, %hi(g1) > addiu $2, $2, %lo(g1) > > with this? > la $2, g1 > > If that
2011 Oct 05
4
[LLVMdev] MIPS 32bit code generation
Hi, In order to emit "la $4,ADDR" instead of lui followed by addiu to load the data address, could you advise what is proper way to revise td files in the MIPS target? Thanks, -- Gang-Ryung Uh, Associate Professor Department of Computer Science College of Engineering, Boise State Univerisity tel: 1 208 426-5691 e-mail:guh at boisestate.edu http://cs.boisestate.edu/~uh
2011 Oct 06
0
[LLVMdev] MIPS 32bit code generation
Do you want to replace lui $2, %hi(g1) addiu $2, $2, %lo(g1) with this? la $2, g1 If that is the case, you can add this pattern. def op_la : Operand<i32>; def LA : FI<0x09, (outs CPURegs:$dst), (ins op_la:$addr0, op_la:$addr1), "la $dst, $addr0", [(set CPURegs:$dst, (add (MipsHi tglobaladdr:$addr0), (MipsLo tglobaladdr:$addr1)))], IIAlu>;
2010 Sep 30
4
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
Bill Wendling wrote: > On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: > >> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >> >>> Our architecture has 1-bit boolean predicate registers. >>> >>> I've defined comparison >>> >>> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set
2010 Oct 01
0
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
On Sep 30, 2010, at 2:13 AM, Heikki Kultala wrote: > Bill Wendling wrote: >> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: >> >>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >>> >>>> Our architecture has 1-bit boolean predicate registers. >>>> >>>> I've defined comparison >>>> >>>> def
2011 Oct 07
0
[LLVMdev] MIPS 32bit code generation
I reiterate. You should fix the simulator. It is broken. The compiler is not. Fix what's broken. -Jim On Oct 7, 2011, at 1:11 PM, Gang-Ryung Uh wrote: > Hi, > > I noticed one class in MipsInstrFormats.td:L46 -> Class MipsPseudo. I wonder whether I can use this. If does, I wonder what would be the right way to use. Thanks, > > > > On Thu, Oct 6, 2011 at
2011 Oct 07
1
[LLVMdev] MIPS 32bit code generation
I don't think I ever said that the MIPS target is broken. I am simply trying to branch out one additional llc target for SimpleScalar PISA architecture. On Fri, Oct 7, 2011 at 2:41 PM, Jim Grosbach <grosbach at apple.com> wrote: > I reiterate. You should fix the simulator. It is broken. The compiler is > not. Fix what's broken. > > -Jim > > On Oct 7, 2011, at 1:11
2010 Sep 29
0
[LLVMdev] comparison pattern trouble - might be a bug in LLVM 2.8?
On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: > On 29 Sep 2010, at 06:25, Heikki Kultala wrote: > >> Our architecture has 1-bit boolean predicate registers. >> >> I've defined comparison >> >> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>;
2010 Sep 29
1
[LLVMdev] comparison pattern trouble - might be a bug in LLVM 2.8?
On 29 Sep 2010, at 06:25, Heikki Kultala wrote: > Our architecture has 1-bit boolean predicate registers. > > I've defined comparison > > > def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>; > > > > > But then I end up having the following bug: > >
2015 Aug 19
3
[RFC] Improving integer divide optimization (related to D12082)
Hello LLVM, A recent commit creates the isIntDivCheap() target query. http://reviews.llvm.org/D12082 The current approach has a couple shortcomings. First, when targets decide divide is cheap, the DAGCombiner ignores obvious power-of-2 optimizations. In the targets I know, shifts are cheaper than divides in both speed and size. The target cannot see the value in the isIntDivCheap() call, so
2014 May 12
1
errors in replication after adding dns records. ( 4.1.7 )
Hai, ? Im getting errors now im filling the dns ( through windows tools and samba-tool ) ( OS : Debian wheezy, Sernet samba 4.1.7 ) ? On my AD DC, im seeing the following in the log file when i restart samba. ? May 12 10:59:36 dc1 samba[2170]:?? enteddnsserver: zone operation 'DeleteNode' not implementeddnsserver: zone operation 'DeleteNode' not implementeddnsserver: zone
2017 Oct 03
1
Deletion in Binary Search Tree
Dear All, I am unable to complete the R code for deleting nodes in a binary search tree. Have provided the code snippet below for an usecase where the node to be deleted would have a leftnode and no rightnode. I am stuck up at how to release the node pertaining to the key value given by the function call and then assigning the leftnode in place of the deleted note. Any help would be appreciated
2015 Aug 20
2
[RFC] Improving integer divide optimization (related to D12082)
> On Aug 19, 2015, at 3:48 PM, escha via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > >> On Aug 19, 2015, at 1:45 PM, Steve King via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> In the targets I know, shifts are >> cheaper than divides in both speed and size. > > From what I remember, udiv by
2012 Jan 12
3
[LLVMdev] 'opt' Aborted "While deleting: void %"
Hey everyone, So I have an LLVM pass that appears to run completely and work fine, and then it aborts at the very end. When exiting the final runOnFunction call, I get the following error / stack dump. I cannot figure out why this is happening for the life of me - does anyone have any ideas? I'm not trying to do any crazy deallocation or anything, it just seems like a normal pass to me.
2017 May 22
2
Optimizing diamond pattern in DAGCombine
Explicitly re-adding a node to be processed doesn't work, because the processing order is canonical. 2017-05-22 11:39 GMT-07:00 Nirav Davé <niravd at google.com>: > You can always explicitly add D to the worklist when you make the > transformation with AddToWorklist. Presuambly this was the cause for your > infinite loop. > > -Nirav > > > On Mon, May 22, 2017 at
2012 Jan 12
0
[LLVMdev] 'opt' Aborted "While deleting: void %"
Hi Griffin, did your pass create a data structure that holds values somehow, and forgot to delete it? Also, try running under valgrind in case this is due to a memory error of some kind. Ciao, Duncan. > So I have an LLVM pass that appears to run completely and work fine, and > then it aborts at the very end. When exiting the final runOnFunction call, > I get the following error /
2012 Jan 25
2
[LLVMdev] PLEASE help with Alias Analysis initialization assertion at the end of my pass
Hello all, I really, really, really need your help. This is my third email now, please don't ignore me! I understand this must be a trivial thing, but I've ground to a halt, and REALLY need some guidance. Please see below for the context of my problem. I'm not trying to be a waste of time, but I'm desperate here. I have a getAnalysisUsage method which does the following