similar to: [LLVMdev] Assert on Large Zeroinitializer Store

On 8/24/11 1:51 PM, Eli Friedman wrote: > On Wed, Aug 24, 2011 at 11:41 AM, John Criswell<criswell at illinois.edu> wrote: >> Dear All, >> >> I currently have one of my transforms creating the following store >> instruction: >> >> store [65536 x i8] zeroinitializer, [65536 x i8]* %buf.i, align 16 >> >> ... which causes the SelectionDAG code

On Wed, Aug 24, 2011 at 11:41 AM, John Criswell <criswell at illinois.edu> wrote: > Dear All, > > I currently have one of my transforms creating the following store > instruction: > > store [65536 x i8] zeroinitializer, [65536 x i8]* %buf.i, align 16 > > ... which causes the SelectionDAG code to assert out: > > Assertion failed: (ResNo < NumValues &&

Folks, I'm tracking down a buildbot failure on our self-hosting bot, and because there are several dozens of commits to track on a self-hosting issue (direct compilation goes well), I thought that showing the error on the list would be faster. src/include/llvm/CodeGen/SelectionDAGNodes.h:625: llvm::EVT llvm::SDNode::getValueType(unsigned int) const: Assertion `ResNo < NumValues &&

Hello, This example input crashes if you run it through llc on x86. [begin example] ; ModuleID = 'test' %struct_2 = type { [90000 x %struct_1] } %struct_1 = type { i8 } define void @testFcn(%struct_2 %in1) { testFcn_entry: %in1_ = alloca %struct_2 store %struct_2 %in1, %struct_2* %in1_, align 8 %localStruct_ = alloca %struct_2 store %struct_2 %in1, %struct_2* %localStruct_,

FAIL: /usr/home/llvm/obj/../test/Regression/CodeGen/X86/io.llx: Assertion failed: (ResNo < Values.size() && "Illegal result number!"), function getValueType, file /usr/home/llvm/obj/../include/llvm/CodeGen/SelectionDAGNodes.h, line 507. Abort trap (core dumped) FAIL: /usr/home/llvm/obj/../test/Regression/CodeGen/X86/ioport.llx: Assertion failed: (ResNo < Values.size()

Hello, I am working on the backend for an architecture which has a compare instruction that affects only an internal condition code register (basically a sub without destination register). I get the following assert in the scheduling phase: llvm::SDNode::getValueType(unsigned int) const: Assertion `ResNo < NumValues && "Illegal result number!"' failed. It turns out

On Sat, 14 May 2005, Jeff Cohen wrote: > FAIL: /usr/home/llvm/obj/../test/Regression/CodeGen/X86/io.llx: > Assertion failed: (ResNo < Values.size() && "Illegal result number!"), > function getValueType, file > /usr/home/llvm/obj/../include/llvm/CodeGen/SelectionDAGNodes.h, line 507. > Abort trap (core dumped) > > FAIL:

My last update was at 6:52am PDT Chris Lattner wrote: > On Sat, 14 May 2005, Jeff Cohen wrote: > >> FAIL: /usr/home/llvm/obj/../test/Regression/CodeGen/X86/io.llx: >> Assertion failed: (ResNo < Values.size() && "Illegal result >> number!"), function getValueType, file >> /usr/home/llvm/obj/../include/llvm/CodeGen/SelectionDAGNodes.h, line

Chris was working on this stuff all night (I think, based on commits). The 1.5 branch won't happen till next week. I'm sure Chris will attend to this later today. I have no idea how to fix it. FWIW, I don't get this on GNU-Linux/x86. It could be an os-specific related error. IIRC, You run FreeBSD, right? Reid On Sat, 2005-05-14 at 07:16 -0700, Jeff Cohen wrote: > FAIL:

On Dec 5, 2008, at 6:53 AMPST, Christian Sayer wrote: > Hello, > > I am working on the backend for an architecture which has a compare > instruction that affects only an internal condition code register > (basically a sub without destination register). You want to model the condition codes as a pseudo-register rather than using OutFlag. See the X86 back end. > I get the

I am currently working on DAGToDAGISel class for MIPS and am trying to figure out a way to use INTRINSIC_W_CHAIN for an intrinsic which can return a value. My intrinsic is defined as: Intrinsic<[llvm_i32_ty],[llvm_i32_ty,llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],[IntrReadWriteArgMem]>; i.e. it has four arguments and one return value In DAGToDAGISel when I try to pass it with four arguments and

On May 24, 2008, at 11:43 AM, Marcel Moolenaar wrote: > All, > > So far I've tried LLVM on amd64, i386, ia64 and powerpc under FreeBSD > and aside for ia64, things look pretty good for a first try. There > are 2 unexpected failures for PowerPC, which appear to be caused by > uninitialized memory. I'm still working on a fix for that (need to > brush up on my C++

All, So far I've tried LLVM on amd64, i386, ia64 and powerpc under FreeBSD and aside for ia64, things look pretty good for a first try. There are 2 unexpected failures for PowerPC, which appear to be caused by uninitialized memory. I'm still working on a fix for that (need to brush up on my C++ skills). [sidenote: In FreeBSD -current, the memory allocator initializes memory with 0xa5

On May 24, 2008, at 12:12 PM, Bill Wendling wrote: > Let us know if you would like extra eyes on the two PPC failures. Many > of us have a lot of experience with C++. :-) Do you know where these > allocations are? I don't mind if people help out, so here's some information: FAIL: /nfs/llvm/src/llvm/test/Transforms/PredicateSimplifier/ 2006-11-04-ReplacingZeros.ll Failed with

Hi, The attached patch implements sub.ovf/mul.ovf intrinsics similarly to the recently added add.ovf intrinsics. These are useful for implementing some vm instructions like sub.ovf/mul.ovf in .NET IL efficiently. sub.ovf is supported in target independent lowering and on x86, while mul.ovf is only supported in the x86 backend. Please review

You can tell LLVM that you have "sign extended" setCC results (all ones). Dan On Nov 18, 2008, at 5:33 PM, Eli Friedman wrote: > On Tue, Nov 18, 2008 at 1:56 PM, Villmow, Micah > <Micah.Villmow at amd.com> wrote: >> The IR produces correct results, but my backend does not and the >> only thing >> I can think of is that the IR is treating the

Hello. I fixed the bug reported in the previous post on this thread (<<llvm::MemSDNode::MemSDNode(unsigned int, unsigned int, const llvm::DebugLoc&, llvm::SDVTList, llvm::EVT, llvm::MachineMemOperand*): Assertion `memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!"' failed.>>) The problem with this strange error reported comes from

On May 24, 2008, at 4:25 PM, Marcel Moolenaar wrote: > On May 24, 2008, at 12:12 PM, Bill Wendling wrote: >> Let us know if you would like extra eyes on the two PPC failures. >> Many >> of us have a lot of experience with C++. :-) Do you know where these >> allocations are? > > I don't mind if people help out, so here's some information: Nice!

Some basic changes to allocation bus range, MMIO resource for SR-IOV device. And add new sysfs entry to hotplug core to pass parameter to a slot, which will be used by SR-IOV code. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/bus.c | 63 +++++++++++++-------------

Some basic changes to allocation bus range, MMIO resource for SR-IOV device. And add new sysfs entry to hotplug core to pass parameter to a slot, which will be used by SR-IOV code. Signed-off-by: Yu Zhao <yu.zhao at intel.com> Signed-off-by: Eddie Dong <eddie.dong at intel.com> --- drivers/pci/bus.c | 63 +++++++++++++-------------