Displaying 20 results from an estimated 100 matches similar to: "[LLVMdev] llvm-mc build failure"
2011 Jul 28
0
[LLVMdev] llvm-mc build failure
Dawie Joubert <djjoubert at csir.co.za> writes:
> Recently (approximately a week ago) Clang and LLVM started to failed at
> building. Assuming it was my incompetence, I cleared everything and
> started witha fresh checkout (not that I changed it though). I am on
> Ubuntu 10.04 LTS 64-Bit. And I configure and compile with CMake.
>
> The error message I get at approximatley
2014 Apr 03
5
[LLVMdev] comparing .o files from different build trees
I'm trying to write a script for checking whether the compiler recursed
properly.
rkotler at mipsswbrd002:~/slave/recurse3be/build$ find . -name "*.o" -exec
cmp '{}' ../../recurse2be/build/'{}' \; |& tee foo.txt
Is anyone else doing this?
There 2 compilers, recurse 2 and recurse3 that in principle should be
identical.
Obviously if there is date and time
2016 Sep 07
2
[PowerPC] Recent branch too far breakage
I'm using a recent revision of TOT (280704) to build clang/LLVM for
PowerPC64 little endian. I'm getting an assembler error when building
PPCInstPrinter.cpp:
The error is:
/tmp/PPCInstPrinter-84c835.s: Assembler messages:
/tmp/PPCInstPrinter-84c835.s:7671: Error: operand out of range
(0x0000000000008004 is not between 0xffffffffffff8000 and
0x0000000000007ffc)
The offending line is
2016 Sep 07
2
[PowerPC] Recent branch too far breakage
----- Original Message -----
> From: "Hal Finkel via llvm-dev" <llvm-dev at lists.llvm.org>
> To: "Richard Pennington" <rich at pennware.com>
> Cc: llvm-dev at lists.llvm.org
> Sent: Wednesday, September 7, 2016 7:37:50 AM
> Subject: Re: [llvm-dev] [PowerPC] Recent branch too far breakage
>
> Hi Rich,
>
> It is hard to tell, but there
2011 Jun 22
0
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
On Jun 22, 2011, at 6:15 PM, Jim Grosbach wrote:
>
> On Jun 22, 2011, at 9:00 AM, Renato Golin wrote:
>
>> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote:
>>>> This sounds like a dead end as newer binutils are GPLv3.
>>>
>>> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser
2011 Aug 30
3
[LLVMdev] [PATCH] Fix typo in MSP430MCTargetDesc.h
Hi!
There is a typo in MSP430MCTargetDesc.h.
I've found and fix it.
Thanks!
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2010 Sep 29
0
[LLVMdev] Questions on ARMInstrInfo.td and MC/ARM/ELF
On Sep 29, 2010, at 3:09 PM, Jason Kim wrote:
> Hi Everyone,
>
> I am trying to decide on a MC'ized reorg of ARMAsmPrinter for MC/ELF,
> and had some questions.
>
> Currently, it defines quite a few methods like printAddrMode4Operand
> (linked to ARMInstrInfo.td) that currently assume raw text support in
> the OutStreamer. Are these methods still supposed to be
2011 Aug 30
1
[LLVMdev] [PATCH] Fix typo in MSP430MCTargetDesc.h
On Tue, Aug 30, 2011 at 3:26 PM, James Molloy <James.Molloy at arm.com> wrote:
> Hi,
>
> Thanks! Committed in r138797.
>
> Cheers,
>
> James
>
Hi James
Thanks for review.
May I ask a question? If I summit a patch, should I send here or llvm-commits?
I was told by a friend to send patches to llvm-commits. I'm confused...
--Liu
>> -----Original
2010 Mar 06
0
[LLVMdev] Status of LLVM-MC
On Mar 5, 2010, at 3:20 PM, Wayne Anderson wrote:
> Hello,
>
> I'm interested in the status of LLVM-MC. My particular interest is in
> generating executables for ARM embedded applications. I assume this
> application is not terribly high on the priority list, so I would like
> to know how I can contribute. Can someone point me to some
> information and/or
2011 Aug 30
0
[LLVMdev] [PATCH] Fix typo in MSP430MCTargetDesc.h
Hi,
Thanks! Committed in r138797.
Cheers,
James
> -----Original Message-----
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On
> Behalf Of Liu
> Sent: 30 August 2011 05:50
> To: LLVM Developers Mailing List
> Subject: [LLVMdev] [PATCH] Fix typo in MSP430MCTargetDesc.h
>
> Hi!
>
> There is a typo in MSP430MCTargetDesc.h.
>
2011 Jun 22
2
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
On Jun 22, 2011, at 9:00 AM, Renato Golin wrote:
> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote:
>>> This sounds like a dead end as newer binutils are GPLv3.
>>
>> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser whipped into usable shape. We're much more in control of our own destiny then.
2011 Aug 31
0
[LLVMdev] Trouble using the MCJIT: "Target does not support MC emission" error
Hi Matt, hi Bruno,
I am still struggling to use AVX via MCJIT on TOT... did you succeed yet?
I seem to be unable to even get lli to run some code with the
"use-mcjit" flag.
I attached a test case that works fine for "lli y.bc" but exits with an
error for "lli -use-mcjit y.bc":
"LLVM ERROR: Unknown object format"
If I call InitializeAllTargetMCs() before
2012 Dec 19
0
[LLVMdev] question about printAliasInstr
I am considering using MipsInstPrinter::printAliasInstr, which is
auto-generated in MipsGenAsmWriter.inc, to print assembly idioms defined as
instruction aliases. For example, an instruction which used to be printed
as
"nor $1, $2, $zero"
can be printed as
"not $1, $2"
This is nice because it makes the code printed by code-gen or disassembler
more readable.
However, the
2011 Jun 22
2
[LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs
On Jun 22, 2011, at 10:03 AM, Damjan Marion wrote:
>
> On Jun 22, 2011, at 6:15 PM, Jim Grosbach wrote:
>
>>
>> On Jun 22, 2011, at 9:00 AM, Renato Golin wrote:
>>
>>> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote:
>>>>> This sounds like a dead end as newer binutils are GPLv3.
>>>>
>>>> Yeah,
2015 Feb 28
2
[LLVMdev] LLVM register number for MIPS DAGToDAG
Thanks for your reply Quentin. I do understand that the registers are
allocated much later in the pipeline.
I am assuming that the physical registers are allocated before
MipsAsmPrinter class.
I am doing something like
if (MI->getOpcode() == Mips::OPCODE) {
unsigned n = MI->getNumOperands();
for(unsigned i=0 ; i < n ; i++) {
const MachineOperand &MO =
2011 Aug 26
2
[LLVMdev] Trouble using the MCJIT: "Target does not support MC emission" error
Following along from lli code, if you add a call to InitializeNativeTargetAsmPrinter() during setup, it gets a bit farther and crashes rather than issuing that error. (Rebuilding with debugging symbols now to dig into it further…)
-matt
Program received signal EXC_BAD_ACCESS, Could not access memory.
Reason: KERN_INVALID_ADDRESS at address: 0x0000000000000000
0x000000010000349e in
2010 Sep 29
3
[LLVMdev] Questions on ARMInstrInfo.td and MC/ARM/ELF
Hi Everyone,
I am trying to decide on a MC'ized reorg of ARMAsmPrinter for MC/ELF,
and had some questions.
Currently, it defines quite a few methods like printAddrMode4Operand
(linked to ARMInstrInfo.td) that currently assume raw text support in
the OutStreamer. Are these methods still supposed to be invoked in the
MC'ized path for assembly output?
Is JimG's new MC/.s
2010 Mar 05
2
[LLVMdev] Status of LLVM-MC
Hello,
I'm interested in the status of LLVM-MC. My particular interest is in
generating executables for ARM embedded applications. I assume this
application is not terribly high on the priority list, so I would like
to know how I can contribute. Can someone point me to some
information and/or docs on the project and its status. Also, if
someone could give me an example of how
2011 Jul 06
0
[LLVMdev] MCInstPrinter::printRegName
I have a question regarding implementation of subclasses of MCInstPrinter.
I am implementing Machine IR layer to MC layer lowering for Mips.
What's the best way to print the value of "Register" in the following code
in MCAsmStreamer::EmitRegisterName? Do I have to convert the LLVM register
number back to its corresponding dwarf register number in function
2011 Sep 29
1
[LLVMdev] Floating-Point Constants in TableGen?
Is it possible to represent floating-point constants in TableGen
definitions?
Let's say I have the following pattern:
def : Pat<(i1 (trunc RegI16:$a)), (SETPGTu16ri RegI16:$a, 0)>;
Note the zero constant in the result. Is there a way to represent
floating-point literals in the same way? Something like...
def : Pat<(i1 (uint_to_fp RegF32:$a)), (SETPGTf32ri RegF32:$a,