Displaying 7 results from an estimated 7 matches similar to: "[LLVMdev] Trying to optimize out store/load pair"
2011 Jul 17
0
[LLVMdev] Trying to optimize out store/load pair
Hello all,
My app is using LLVM JIT as a runtime engine for image analysis (similar to opencl). I'm placing values into a struct to pass byref to a series of functions. After running the createStandardModulePasses(...) set of optimizations, the function calls are all inlined but the struct store/load pairs haven't been optimized away. I've attached the code below. What I'd like to
2016 Aug 02
2
Instruction selection problems due to SelectionDAGBuilder
Hello.
I'm having problems at instruction selection with my back end with the following
basic-block due to a vector add with immediate constant vector (obtained by vectorizing a
simple C program doing vector sum map):
vector.ph: ; preds = %vector.memcheck50
%.splatinsert = insertelement <8 x i64> undef, i64 %i.07.unr, i32 0
2010 Sep 29
0
[LLVMdev] spilling & xmm register usage
On Sep 29, 2010, at 8:35 AMPDT, Ralf Karrenberg wrote:
> Hello everybody,
>
> I have stumbled upon a test case (the attached module is a slightly
> reduced version) that shows extremely reduced performance on linux
> compared to windows when executed using LLVM's JIT.
>
> We narrowed the problem down to the actual code being generated, the
> source IR on both systems
2013 Oct 19
2
[LLVMdev] Name of Virtual Registers
How can I get the name of the virtual Registers present on an instruction.
eg. %add18 = add nsw i32 %mul17, %37
in this case I want to extract the name of the virutal registers as "add18",
"mul17","37".
This can easily be done in the case of store Instruction
eg. store i32 %add20, i32* %t, align 4
in this case functions like
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
Hello everyone,
please I need your help.
To reproduce my problem I created simple pass for backends (TestPass.cpp
in attached files). That pass I call from Mips backend in this way
(MipsTargetMachine.cpp):
bool MipsPassConfig::addPreRegAlloc() {
addPass(createTestPass());
return false;
}
The problem becomes, when I am trying compile file ldtoa.ll (in attached
files). Compiling
2013 Oct 21
0
[LLVMdev] How to fix the operand references of cloned instruction
I have cloned an instruction from one basic block to another newly created
block in newly created function.
And since am cloning an instruction the operands of that instruction still
points to the instructions of old block. Due to which am getting an error as
"Instruction does not dominate all uses!".
example:-
original function and block:-
%a = alloca i32, align 4
%x = alloca
2010 Sep 29
3
[LLVMdev] spilling & xmm register usage
Hello everybody,
I have stumbled upon a test case (the attached module is a slightly
reduced version) that shows extremely reduced performance on linux
compared to windows when executed using LLVM's JIT.
We narrowed the problem down to the actual code being generated, the
source IR on both systems is the same.
Try compiling the attached module:
llc -O3 -filetype=asm -o BAD.s BAD.ll
Under