similar to: [LLVMdev] 32bit MIPS (little endian) code gen for simplescalar 3.0

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] 32bit MIPS (little endian) code gen for simplescalar 3.0"

2011 Oct 07
1
[LLVMdev] MIPS 32bit code generation
I don't think I ever said that the MIPS target is broken. I am simply trying to branch out one additional llc target for SimpleScalar PISA architecture. On Fri, Oct 7, 2011 at 2:41 PM, Jim Grosbach <grosbach at apple.com> wrote: > I reiterate. You should fix the simulator. It is broken. The compiler is > not. Fix what's broken. > > -Jim > > On Oct 7, 2011, at 1:11
2011 Oct 06
1
[LLVMdev] MIPS 32bit code generation
Hi, for our micro-architecture research, we are using simplescalar 3.0 32bit mips simulator, which comes with binutils 1.5.2, and the ld fails at "lui" (bfd error). However, the ld is happy with "la" (assembler macro) and simulator correctly simulates. On Wed, Oct 5, 2011 at 5:04 PM, Eric Christopher <echristo at apple.com> wrote: > > On Oct 5, 2011, at 4:01 PM,
2011 Oct 07
0
[LLVMdev] MIPS 32bit code generation
I reiterate. You should fix the simulator. It is broken. The compiler is not. Fix what's broken. -Jim On Oct 7, 2011, at 1:11 PM, Gang-Ryung Uh wrote: > Hi, > > I noticed one class in MipsInstrFormats.td:L46 -> Class MipsPseudo. I wonder whether I can use this. If does, I wonder what would be the right way to use. Thanks, > > > > On Thu, Oct 6, 2011 at
2011 Oct 07
2
[LLVMdev] MIPS 32bit code generation
Hi, I noticed one class in MipsInstrFormats.td:L46 -> Class MipsPseudo. I wonder whether I can use this. If does, I wonder what would be the right way to use. Thanks, On Thu, Oct 6, 2011 at 11:29 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: > Do you want to replace > > lui $2, %hi(g1) > addiu $2, $2, %lo(g1) > > with this? > la $2, g1 > > If that
2011 Oct 05
4
[LLVMdev] MIPS 32bit code generation
Hi, In order to emit "la $4,ADDR" instead of lui followed by addiu to load the data address, could you advise what is proper way to revise td files in the MIPS target? Thanks, -- Gang-Ryung Uh, Associate Professor Department of Computer Science College of Engineering, Boise State Univerisity tel: 1 208 426-5691 e-mail:guh at boisestate.edu http://cs.boisestate.edu/~uh
2011 Jul 15
2
[LLVMdev] LLVM and little-endian 32-bit MIPS code generation
Hi, We have tried and generate assembly code for very simple test C code. But, binutils-2.5.2 (simplesim-3.0) cannot handle the produced assembly code with the following complaints. Could you advise which version of bitutils that we need to use for mips code with LLVM with Clang? Thanks, $ GCC addr01.s addr01.s: Assembler messages: addr01.s:1: Error: Unknown pseudo-op: `.section'
2011 Oct 06
0
[LLVMdev] MIPS 32bit code generation
Do you want to replace lui $2, %hi(g1) addiu $2, $2, %lo(g1) with this? la $2, g1 If that is the case, you can add this pattern. def op_la : Operand<i32>; def LA : FI<0x09, (outs CPURegs:$dst), (ins op_la:$addr0, op_la:$addr1), "la $dst, $addr0", [(set CPURegs:$dst, (add (MipsHi tglobaladdr:$addr0), (MipsLo tglobaladdr:$addr1)))], IIAlu>;
2011 Jul 11
0
[LLVMdev] LLVM and little-endian 32-bit MIPS code generation
It will produce little-endian code if you replace "mips" with "mipsel". 1. clang -ccc-host-triple mipsel-unknown-linux -ccc-clang-archs mipsel -O3 -S -emit-llvm foo.c -o foo.ll 2. llc -march=mipsel -mcpu=4ke foo.ll -o foo.s (the -march option is redundant) If you do not specify the target cpu with -mcpu, by default it will generate code for Mips1, which has not been tested as
2011 Jul 15
1
[LLVMdev] LLVM and little-endian 32-bit MIPS code generation
Hi, We would like to assemble .s file using binutils-2.5.2 which comes with simple-scalar3.0. Unfortunately, this particular version of binutils doesn't seem to handle global-offset-table (position independent code) and the some of the mips instructions. Thanks, On Fri, Jul 15, 2011 at 11:39 AM, Eric Christopher <echristo at apple.com>wrote: > > On Jul 15, 2011, at 10:13
2011 Oct 05
0
[LLVMdev] MIPS 32bit code generation
On Oct 5, 2011, at 4:01 PM, Gang-Ryung Uh wrote: > Hi, > > In order to emit "la $4,ADDR" instead of lui followed by addiu to load the data address, could you advise what is proper way to revise td files in the MIPS target? Why? -eric
2011 Oct 06
0
[LLVMdev] MIPS 32bit code generation
A simulator should be expecting the machine opcodes not macros. LD shouldn't care at all as long as the object format plays well. I would think it would be better to fix the simulator. Jack ________________________________________ From: llvmdev-bounces at cs.uiuc.edu [llvmdev-bounces at cs.uiuc.edu] on behalf of llvmdev-request at cs.uiuc.edu [llvmdev-request at cs.uiuc.edu] Sent: Thursday,
2011 Jul 09
2
[LLVMdev] LLVM and little-endian 32-bit MIPS code generation
We are trying to use LLVM (Clang as the C frontend) to generate code for 32-bit MIPS (little-endian)l, which can run on simplescalar 3.0 sslittle-na-sstrix platform. Can you advise what would be the right way to use the LLVM compiler infrastructure? The following is the one I used, but it appears that it produce the code in big-endian (and I wonder whether the calling convention is right.) To
2008 Jun 16
1
[LLVMdev] [llvm-announce] llvm and simplescalar
It use to. alphasim (the validated alpha model based on simplescalar) is better though. Also, since no one has needed to run simplescalar experiments, the alpha backend has bitrotted some. The last version that I know worked with most of spec was llvm 1.8 or so. You need to get or write an elf64 loader and fix a couple instruction implementations in simplescalar to get it to run linux binaries
2015 May 07
2
[LLVMdev] llvm cross compilation and simplescalar simulation for ARM
Hi, I want to explorer affection of compiler on low power. For the project background, I tend to process this work via LLVM, rather than GCC. And the Target is ARM. For this purpose, clang(3.2) + arm-gcc + simplescalar-arm(and panalyzer) seems to be a good choice. But I encounter several problems in the processing of setup the environment. ---------------------------------- 1. Firstly, arm
2012 Sep 26
1
[LLVMdev] [Questions] clang cross compilation and SimpleScalar simulation
Simplescalar is not compatible with llvm because the binutils simplescalar is based on is ancient. Jim On Sep 26, 2012, at 12:21 AM, 陳奕梅 <ymchen at sslab.cs.nctu.edu.tw> wrote: > Dear all > > I use arm-linux-gcc 2.95.2, because the code generated by version 3.X and 4.X can not run on SimpleScalar. > So I use the arm-linux-gcc 2.95.2 *only*, the version is recommended by
2008 Jun 17
0
[LLVMdev] [llvm-announce] llvm and simplescalar
Thank you for your answers and suggestions! Well, I want to do some experiments about the compiler optimization in llvm under SPM and I need performance evaluation. As I know, alpha is a general-purpose CPU, so I consider that arm may be an alternative. Simplesim-arm is able to do performance simulation while m5-arm is still under development. Then, what should I do? Do the experiment under
2012 Sep 26
0
[LLVMdev] [Questions] clang cross compilation and SimpleScalar simulation
Dear all I use arm-linux-gcc 2.95.2, because the code generated by version 3.X and 4.X can not run on SimpleScalar. So I use the arm-linux-gcc 2.95.2 *only*, the version is recommended by SimpleScalar. The code generated by arm-linux-gcc 2.95.2 can run on SimpleScalar. Now I want to use llvm/clang to generate ARM assembly code and arm-linux-gcc 2.95.2 to be assembler. Unfortunately, I got some
2008 Jun 16
6
llvm and simplescalar
hello everyone, I'm wondering whether llvm can work together with simplescalar. Would anyone please give me some clarification? Thanks a lot!
2008 Jun 16
6
llvm and simplescalar
hello everyone, I'm wondering whether llvm can work together with simplescalar. Would anyone please give me some clarification? Thanks a lot!
2008 Jun 16
0
[LLVMdev] [llvm-announce] llvm and simplescalar
On Sunday 15 June 2008 22:30, Andrew Lenharth wrote: > It use to. alphasim (the validated alpha model based on simplescalar) > is better though. Also, since no one has needed to run simplescalar > experiments, the alpha backend has bitrotted some. The last version > that I know worked with most of spec was llvm 1.8 or so. You need to > get or write an elf64 loader and fix a