similar to: [LLVMdev] code generation removes duplicated instructions

On 6 July 2011 02:31, D S Khudia <daya.khudia at gmail.com> wrote: >   %0 = load i32* %i, align 4 >   %HV14_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 >   %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0 >   %HVCmp7 = icmp ne i32* %1, %HV14_ >   br i1 %HVCmp7, label %relExit, label %bb.split > > So that HV14_ is a new instruction and I am

Thank you for replying. Yes. The remaining part of the BB is in splitted basic block. The following is an example code generation for arm and x86 for a same IR BB. In the x86 code I can see that the same computation is done twice and result is stored in two different registers and then these two different registers are used for comparision. By the way I am duplicating instruction and inserting

Hi Renato, I am trying to add a intrinsic call between the similar two instructions which either I'll remove or convert to nop in codegen. Does that kind of seem appropriate for the purpose here? Thanks Daya On Wed, Jul 6, 2011 at 11:55 AM, Renato Golin <renato.golin at arm.com> wrote: > On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote: > > Since I am

On 7 July 2011 00:02, D S Khudia <daya.khudia at gmail.com> wrote: > I am trying to add a intrinsic call between the similar two instructions > which either I'll remove or convert to nop in codegen. If the two instructions are only similar in your real example, than you need to make them similar in your test, not identical. Different offsets, different array... If them two are

Ok. Let me describe the problem again in some detail. The following is the original bitcode from a real testcase: bb7: %46 = load i32* %j, align 4 %47 = add nsw i32 %46, 1 store i32 %47, i32* %j, align 4 br label %bb8 To protect the operand of the store I duplicate the input chain of operands and insert a comparison to check whether the operand of the stores are correct. As a result of

On 6 July 2011 14:55, D S Khudia <daya.khudia at gmail.com> wrote: > The following is an example code generation for arm and x86 for a same IR > BB. In the x86 code I can see that the same computation is done twice and > result is stored in two different registers and then these two different > registers are used for comparision. Yes, but you shouldn't rely on it, since the

Hello, The code snippet pasted in the previous email are generated at -O0 with llc. Since I am inserting a new basic block (contains printf statement and program exit) which is jumped upon based on the result of the comparison, the compiler cannot/shouldnot optimize that away by means of DCE or anything else. The same kind of stuff is happening for the following duplication. bb6.split:

On 6 July 2011 15:57, D S Khudia <daya.khudia at gmail.com> wrote: > Since I am inserting a new basic block (contains printf statement and > program exit) which is jumped upon based on the result of > the comparison, the compiler cannot/shouldnot optimize that away by means of > DCE or anything else. It most certainly can, since the comparison yields always the same result. The

Thanks for your reply. I have a normal (../configure --enable-profiling --disable-optimized --enable-assertions) llvm debug+profile+assert build. I am generating llvm-bitcode using following commands. llvm-gcc -DLINUX_i386 -DSPEC_CPU2000 -O3 -emit-llvm 186.crafty/src/valid.c -c -o 186.crafty/src/valid.bc --- llvm-link 186.crafty/src/*.bc -o 186.crafty/186.crafty.rel.bc and finally: llc

Hi In my install directory under bin , I had llvm-c++,llvm-g++,llvm-gconv I tested one sample program #llvm-c++ addu.c -o addu-arm as: unrecognized option '-meabi=4' How do i solve this issue Thanks Yuvi R On Fri, Jul 8, 2011 at 9:21 AM, raj raja <yuvaraj.addu at gmail.com> wrote: > Thanks for your reply > > I got error > > */bin/sh: build/genmodes: not

Hi Duncan, Do you have sources also in the $LLVM_SRC_ROOT/projects/test-suite/External/SPEC/CINT2000/164.gzip? The following is content of above directory in my case. I have copied the CINT2000 sources in this directory manually. $ls -1 $LLVM_SRC_ROOT/projects/test-suite/External/SPEC/CINT2000/164.gzip 164.gzip.reference_output 164.gzip.reference_output.small compile_info compile_parms

Here is how I do it on x86-64 machine running Ubuntu-11.04: 1. install flex and bison 2. download arm-2011.03 from www.codesourcery.com and add to path (setenv PATH ${PATH}:/home/dskhudia/projects/arm-2011.03/bin) 3. mkdir llvm-gcc-obj; cd llvm-gcc-obj 4. ../llvm-gcc-4.2-2.9.source/configure --target=arm-none-linux-gnueabi --program-prefix=llvm-

Hi I am trying to cross compile llvm-gcc front for ARM target Followed below steps #../llvm-gcc-4.2-2.9.source/configure --program-prefix=llvm- --enable-llvm=/home/yuvraj/llvm/llvm-2.9 --enable-languages=c,c++ --target=arm-none-linux-gnueabi # make I am getting some kind of linker errors /opt/arm-2010.09/bin/arm-none-linux-gnueabi-ld: cannot find crtn.o: No such file or directory @ final

Thank you all for the inline assembly pointer. I have some macros (FD_ZERO, FD_SET) in benchmark code which comes from C library select (synchronous I/O multiplexing) and it does contain inline assembly. Is there a way the code containing such macros can work for ARM if compiled through llvm? Thanks Daya On Tue, Jun 14, 2011 at 3:02 PM, Duncan Sands <baldrick at free.fr> wrote: > Hi

Hi All I am trying to understand if I can use migrations to migrate data under the following conditions 1. Across 2 different databases (Oracle/DB2) with same schemas. 2. Across 2 different databases (Oracle/DB2) with different schemas. I am trying to avoid writing DBI/OCI8 scripts. Can somone please shed some light if this is even possible? thanks -daya -------------- next part

Hi Is anyone aware of any Document Management System in Rails. Googling didn''t help me find any Rails based solution. The DMS I need, need to have the following feature apart form the usual ones. 1. Version control of documents. 2. Tracking version control for each group of users independently from the other group . These groups may share the same document name but may have different

Hi A newb question. Can I use migrations if all of the following requirements are imposed at the same time. 1. Copy data from an old schema to a new schema, the difference in the 2 schemas is about 25%, 3 new tables and 4 new columns. 2. Copy data from Oracle schema to DB2 schema, around 25% difference in 2 schemas as above. 3. Neither old nor the new schema tables have an

Hi All, I am trying to configure llvm so with test-suite enabled. I have downloaded the test-suite. Spec 2000 benchmarks sources are plugged in speccpu2000 at $LLVM_SRC_ROOT/projects/test-suite-externals/speccpu2000/benchspec e.g.: 164.gzip dir is $LLVM_SRC_ROOT/projects/test-suite-externals/speccpu2000/benchspec/164.gzip My configure command is: ../configure --disable-optimized

Hi All I am using version 0.3.13.3 and since there is no logging support for win32 application. I was wondering if it was possible to get any kind of logging at all. I have tried to these two options 1. Stream redirection using "mongrel_rails start -c C:/myspace/snapshot -p 4111 -t 70 -e production -P log/mongrel-1.pid > C:\temp\mongrel-1.log" The console print the output stream

My source directory wasn't correct but now I have a correct test directory structure. $ls -1 ~/tmp/speccpu2000/benchspec/CINT2000/164.gzip/ data docs exe result run Spec src version I reconfigured the llvm with ../configure --prefix=/home/dskhudia/tmp/llvm-install --with-llvmgccdir=/home/dskhudia/tmp/llvm-install --with-externals=/home/dskhudia/tmp Now I can execute the make -C 164.gzip but