Displaying 20 results from an estimated 6000 matches similar to: "[LLVMdev] Function Pass - Control Flow with uses-iterator"
2016 Jan 21
2
Could I do some control-flow and dataflow analysis cross files and functions via IR
As mentioned in the title, I want to do some control-flow and dataflow
analysis. I can only find the assignment statement in a function, but the
assigned variable is just a parameter of this function.
For example,
****************************************
int foo(struct A* a, int b, ...){
...
a->Int_field = b;
...
return 0;
}
*****************************************
in the code
2017 Feb 06
2
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Jean-Marc,
Thanks a lot for reviewing this huge assembly function!
silk_warped_autocorrelation_FIX_c()'s kernel part is
for( n = 0; n < length; n++ ) {
tmp1_QS = silk_LSHIFT32( (opus_int32)input[ n ], QS );
/* Loop over allpass sections */
for( i = 0; i < order; i++ ) {
/* Output of allpass section */
tmp2_QS = silk_SMLAWB(
2017 Feb 07
2
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
This is a great idea. But the order (psEncC->shapingLPCOrder) can be
configured to 12, 14, 16, 20 and 24 according to complexity parameter.
It's hard to get a universal function to handle all these orders
efficiently. Any suggestions?
Thanks,
Linfeng
On Mon, Feb 6, 2017 at 12:40 PM, Jean-Marc Valin <jmvalin at jmvalin.ca> wrote:
> Hi Linfeng,
>
> On 06/02/17 02:51 PM,
2013 Nov 14
1
DAHDI with (CDR(userfield)
Hi list, I need some help to improve my cdr, now in my company are
asking me how
to know which of my phone numbers are most used when receiving calls from
the PSTN and incoming the IVR
was thinking about using userfield field, and I'm trying to do, I have at
the moment 4 channel DAHDI
; DAHDI CHANNEL 3=23XXXXX6
context=in
callerid=asreceived
group=1
signalling=fxs_ks
channel => 3
2017 Feb 07
3
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Jean-Marc,
Thanks for your suggestions. Will get back to you once we have some updates.
Linfeng
On Mon, Feb 6, 2017 at 5:47 PM, Jean-Marc Valin <jmvalin at jmvalin.ca> wrote:
> Hi Linfeng,
>
> On 06/02/17 07:18 PM, Linfeng Zhang wrote:
> > This is a great idea. But the order (psEncC->shapingLPCOrder) can be
> > configured to 12, 14, 16, 20 and 24 according to
2017 Apr 05
2
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
I attached a new patch with small cleanup (disassembly is identical as the
last patch). We have done the same internal testing as usual.
Also, attached 2 failed temporary versions which try to reduce code size
(just for code review reference purpose).
The new patch of silk_warped_autocorrelation_FIX_neon() has a code size of
3,228 bytes (with gcc).
smaller_slower.c has a code size of 2,304
2012 Jul 09
1
[LLVMdev] Problem with getting a result of an instruction.
Hello,
I'm a newbie in LLVM. Now I'm trying to implement a pass that does some
simple form of dynamic dataflow analysis.
In my dataflow analysis I want to know if a specific variable is
"dependent" on another one. "Dependent" means the following: if we have
three variables in a program - a, b and c and in some places of this
program we have the following
2016 Aug 29
2
GVN / Alias Analysis issue with llvm.masked.scatter/gather intrinsics
Hello everyone,
I think I have found an gvn / alias analysis related bug, but before
opening an issue on the tracker I wanted to see if I am missing something.
I have the following testcase:
define spir_kernel void @test(<2 x i32*> %in1, <2 x i32*> %in2, i32* %out) {
> entry:
> ; Just some temporary storage
> %tmp.0 = alloca i32
> %tmp.1 = alloca i32
> %tmp.i =
2011 Mar 18
1
[LLVMdev] standard Data Flow Analysis available in LLVM?
I am working on implementing an algorithm that needs one of the standard
Data Flow Analysis as its precondition (VeryBusyExpression to be precise).
Thus I take a look into LLVM (2.8) and check their availability.
I do expect to see all of the following standard ones:
- Reaching Definition (RD)
- Live Variable (LV)
- Available Expression (AE)
- Very Busy Expression (VBE)
To my surprise, I
2017 Apr 05
4
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Thank Jean-Marc!
The speedup percentages are all relative to the entire encoder.
Comparing to master, this optimization patch speeds up fixed-point SILK
encoder on NEON as following: Complexity 5: 6.1% Complexity 6: 5.8%
Complexity 8: 5.5% Complexity 10: 4.0%
when testing on an Acer Chromebook, ARMv7 Processor rev 3 (v7l), CPU max
MHz: 2116.5
Thanks,
Linfeng
On Wed, Apr 5, 2017 at 11:02 AM,
2016 Aug 29
2
GVN / Alias Analysis issue with llvm.masked.scatter/gather intrinsics
this is definitely a bug in AA.
225 for (auto I = CS2.arg_begin(), E = CS2.arg_end(); I != E; ++I) {
226 const Value *Arg = *I;
227 if (!Arg->getType()->isPointerTy())
-> 228 continue;
229 unsigned CS2ArgIdx = std::distance(CS2.arg_begin(), I);
230 auto CS2ArgLoc = MemoryLocation::getForArgument(CS2,
CS2ArgIdx, TLI);
2011 May 07
1
Evaluating a multivariable function XXXX
>
> Hello everyone,
>
> I have the following R code for a multivariable function:
>
>
> > fn2<-function(x,y,z){(y+2*z)/(5*y-x*z)}
> >
> > fn2(-5,-2,3)
> [1] 0.8
>
>
>
> No problems.
>
> ===
>
> If, however, I call the function using a vector substitution for the
> arguments, R sees this as 3 separate calls to the function while
2016 Aug 29
2
GVN / Alias Analysis issue with llvm.masked.scatter/gather intrinsics
+ a few others.
After following this rabbit hole a bit, there are a lot of mutually
recursive calls, etc, that may or may not do the right thing with vectors
of pointers.
I can fix *this* particular bug with the attached patch.
However, it's mostly papering over stuff. Nothing seems to know what to do
with a memorylocation that is a vector of pointers. They all expect
memorylocation to be a
2016 Aug 29
2
GVN / Alias Analysis issue with llvm.masked.scatter/gather intrinsics
Okay, so then it sounds like, for now, the right fix is to stop marking
masked.gather and masked.scatter with intrarg* options.
On Mon, Aug 29, 2016, 1:26 PM Philip Reames <listmail at philipreames.com>
wrote:
> We might have specification bug here, but we appear to implement what we
> specified. argmemonly is specified as only considering pointer typed
> arguments. It's
2013 Feb 14
2
[LLVMdev] Question about fastcc assumptions and seemingly superfluous %esp updates
Hello,
While investigating one of the existing tests
(test/CodeGen/X86/tailcallpic2.ll), I ran into IR that produces some
interesting code. The IR is very straightforward:
define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
entry:
ret i32 %a3
}
define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
entry:
%tmp11 = tail call fastcc i32 @tailcallee( i32 %in1, i32 %in2, i32
2016 Aug 30
2
GVN / Alias Analysis issue with llvm.masked.scatter/gather intrinsics
----- Original Message -----
> From: "Daniel Berlin" <dberlin at dberlin.org>
> To: "Philip Reames" <listmail at philipreames.com>, "Davide Italiano"
> <davide at freebsd.org>, "Chandler Carruth" <chandlerc at gmail.com>
> Cc: "Chris Sakalis" <chrissakalis at gmail.com>, "David Majnemer"
>
2016 Aug 31
2
GVN / Alias Analysis issue with llvm.masked.scatter/gather intrinsics
Thank you for the quick fix, I can no longer reproduce the issue. As far a
releases go, I am guessing that this is going to be in 4.0?
Best,
Chris
On Tue, Aug 30, 2016 at 9:26 PM, Daniel Berlin <dberlin at dberlin.org> wrote:
> Yeah, i just hope it doesn't regress scatter/gather vector code badly.
> But at least it's correct now?
>
>
> On Tue, Aug 30, 2016 at 1:11
2016 Aug 31
2
GVN / Alias Analysis issue with llvm.masked.scatter/gather intrinsics
Great, thank you!
On Wed, Aug 31, 2016 at 2:07 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>
> ------------------------------
>
> *From: *"Chris Sakalis" <chrissakalis at gmail.com>
> *To: *"Daniel Berlin" <dberlin at dberlin.org>
> *Cc: *"Hal Finkel" <hfinkel at anl.gov>, "David Majnemer" <
> david.majnemer
2013 Feb 15
0
[LLVMdev] Question about fastcc assumptions and seemingly superfluous %esp updates
Hey Eli,
On Thu, Feb 14, 2013 at 5:45 PM, Eli Bendersky <eliben at google.com> wrote:
> Hello,
>
> While investigating one of the existing tests
> (test/CodeGen/X86/tailcallpic2.ll), I ran into IR that produces some
> interesting code. The IR is very straightforward:
>
> define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32
> %a4) {
> entry:
>
2015 Dec 01
11
[PATCH 1/6] x86: Add VMWare Host Communication Macros
These macros will be used by multiple VMWare modules for handling
host communication.
v2:
* Keeping only the minimal common platform defines
* added vmware_platform() check function
v3:
* Added new field to handle different hypervisor magic values
Signed-off-by: Sinclair Yeh <syeh at vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom at vmware.com>
Reviewed-by: Alok N Kataria