similar to: [LLVMdev] ARM instructions clobbering frame pointer

On 2011-06-26, at 8:44 AM, Jakob Stoklund Olesen wrote: > On Jun 25, 2011, at 11:39 PM, Cameron Zwarich wrote: > >> Someone hit a bug (not in bugs.llvm.org) caused by the non-Darwin call instructions not being marked as using the frame pointer. Is it safe to just add r11 / r7 as uses to the appropriate instructions like we do on Darwin? Does anyone care about the slight pessimization

On Jun 25, 2011, at 11:39 PM, Cameron Zwarich wrote: > Someone hit a bug (not in bugs.llvm.org) caused by the non-Darwin call instructions not being marked as using the frame pointer. Is it safe to just add r11 / r7 as uses to the appropriate instructions like we do on Darwin? Does anyone care about the slight pessimization this would cause in the -fomit-frame-pointer case? That sounds very

Nella citazione giovedì 7 luglio 2011 19:41:16, John McCall ha scritto: > On Jul 7, 2011, at 4:33 AM, Carlo Alberto Ferraris wrote: >> Il 07/07/2011 11:14, Cameron Zwarich ha scritto: >>> I haven't read the code in detail, but it looks like JumpThreading at >>> least attempts to thread across indirect branches. You can either try >>> to fix it or file a

Hello all, I noticed that for ARM Thumb target, llc uses r7 as frame pointer (gcc does not do this AFAIK), and this register should therefore not be used as a general-purpose register. However, when compiling mbedTLS, which contains some code that is highly optimized for ARM platform and uses r7 to efficiently perform an operation. This raises an exception since r7 is now the frame pointer. I

On Jul 7, 2011, at 4:33 AM, Carlo Alberto Ferraris wrote: > Il 07/07/2011 11:14, Cameron Zwarich ha scritto: >> >> I haven't read the code in detail, but it looks like JumpThreading at least attempts to thread across indirect branches. You can either try to fix it or file a bug with your test case. > In the source it says "If the predecessor is an indirect goto, we

Il 07/07/2011 11:14, Cameron Zwarich ha scritto: > I haven't read the code in detail, but it looks like JumpThreading at > least attempts to thread across indirect branches. You can either try > to fix it or file a bug with your test case. In the source it says "If the predecessor is an indirect goto, we can't split the edge.

On Jul 22, 2011, at 11:44 PM, Jakob Stoklund Olesen wrote: > On Jul 22, 2011, at 10:29 PM, Bill Wendling wrote: > >> // Restrictions: >> >> There are several new invariants which will be enforced by the verifier: >> >> 1. A landing pad block is a basic block which is the unwind destination of an >> invoke instruction. >> 2. A landing pad block

On Mar 16, 2011, at 9:31 AM, Cameron Zwarich wrote: > Promoting the return value is unsafe for bool returns on x86-64, which in the latest revision of the ABI only guarantees that the top 7 bits of the 8-bit register are 0. My comment is a bit off, because the question of what type to make the return value is somewhat orthogonal to the question of which zext assert we should add. Cameron

On Feb 16, 2013, at 1:31 PM, Cameron Zwarich <zwarich at apple.com> wrote: > That's exactly the right place. Really? You don't want the expansion to be optimized? You want to specify a machine model for the pseudo's as if they're real instructions? You don't want to schedule or register allocate the real instructions? -Andy > On Feb 16, 2013, at 1:08 PM, Reed

On Feb 8, 2013, at 4:37 PM, Cameron Zwarich <zwarich at apple.com> wrote: > On Feb 8, 2013, at 4:20 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > >> On Feb 8, 2013, at 4:03 PM, Cameron Zwarich <zwarich at apple.com> wrote: >> >>> How much of the work is done here? I'd be happy to do the phi elimination part, since I basically did that

On Mon, Nov 21, 2011 at 1:03 PM, Michael Smith <Michael.Smith at synopsys.com> wrote: > Sorry, Dead Store Elimination. Hmm... does tweaking the value of BlockScanLimit in MemoryDependenceAnalysis.cpp help? -Eli > > > > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of Michael Smith > Sent: Monday, November 21, 2011 12:20 PM

You are trying to do a few different things here, and a uniform solution may not work for all of them. For a fixed instruction sequence, e.g. a special kind of move-and-branch sequence used for tail calls, you probably want a pseudo. If you are trying to combine arbitrary instructions together, e.g. Thumb IT blocks, you probably want to use bundles, even if the sequences are a fixed length. I

It looks like this problem only exists on nested loops, ideas? On Thu, Jan 12, 2012 at 11:44 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > Is it not a good idea to try and extract loops that have multiple exits? > > > On Thu, Jan 12, 2012 at 10:44 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > >> I am trying to use ExtractLoop() but I am getting segFaults:

I'm porting the musl C library to ARM Thumb. It looks like inline asm is failing in some cases. Here's one: The lseek system call looks like this: ... off_t result; return syscall(SYS__llseek, fd, offset>>32, offset, &result, whence) ? -1 : result; ... Which eventually goes through this macro: static inline long __syscall5(long n, long a, long b, long c,

The allocator you are building, is it the Hack's and Goos's polynomial time algorithm? On Tue, Oct 5, 2010 at 7:14 PM, Cameron Zwarich <zwarich at apple.com> wrote: > There is nothing that currently handles this properly, as far as I know. If you have a phi > > c = phi(a, b) > > where a, b and c are all assigned distinct stack slots, then copies must be inserted in

Aye, between all current register allocators the 'AU.addRequiredID(PHIEliminationID);' will cause phi's to be eliminated to copies, but this misses the point of my question. What I am asking, is how does stack know that the value of the variable which the resulting value of the phi is currently allocated at. For instance take the instruction: Machine Basic Block (mbb) 12 reg16666 =

On Feb 8, 2013, at 4:45 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > On Feb 8, 2013, at 4:37 PM, Cameron Zwarich <zwarich at apple.com> wrote: > >> I'll try doing that. Did you ever add a way to update LiveIntervals quickly after splitting an edge or will that have to finally be added? I can skip the critical edge splitting for now. > > That

On Jun 12, 2011, at 1:25 AM, Duncan Sands wrote: > Hi Sohail, > >> Is LLVM expressive enough to represent asynchronous exceptions? > > not currently. The first step in this direction is to get rid of the invoke > instruction and attach exception handling information to basic blocks. See > http://nondot.org/sabre/LLVMNotes/ExceptionHandlingChanges.txt > for a

Hello Cameron, thanks a lot for your fast answer, which just makes me curious if making ARM tailcalls on par with x86 in the future is on some of the development plans already? If not, then what do you think is the complexity of such work? Thanks! Karel On 06/17/11 10:41 PM, Cameron Zwarich wrote: > They work pretty well now, at least on Thumb2 / Darwin. It is still fairly conservative

Sorry, forgot to add group to CC. On Sun, Nov 20, 2011 at 6:14 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > Cameron, > > To make it less vague, I would ideally like to traverse top down. I > believe what you suggested is what I want, I will have a look at it. > > Currently, I am iterating over the BBs in a Function, so > Function::iterator BBitr=F->begin(),