similar to: [LLVMdev] ARM thumb-2 instruction used for non-thumb2 CPUs

On 22 June 2011 11:49, Damjan Marion <damjan.marion at gmail.com> wrote: > # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c Even though you specified cpu as arm9, it's probably generating generic ARM IR (use -emit-llvm -S and see), which defaults to ARM instructions. If you want thumb, use triple =

On Jun 22, 2011, at 3:16 PM, Renato Golin wrote: > On 22 June 2011 11:49, Damjan Marion <damjan.marion at gmail.com> wrote: >> # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c > > Even though you specified cpu as arm9, it's probably generating > generic ARM IR (use -emit-llvm -S and see), which defaults

Hi > I just realized that clang produces Thumb-2 instruction in code even when older CPU type which doesn't suport Thumb-2 is specified. > > Here is output: > > # /opt/llvm/bin/clang -S -ccc-host-triple arm-unknown-freebsd -mcpu=arm926ej-s -mfloat-abi=soft -v -o rrx.S rrx.c > clang version 3.0 (http://llvm.org/git/clang.git 98138cdfdee05c0afbab2b209ce8cfe4a52474e1) >

On Jun 22, 2011, at 10:03 AM, Damjan Marion wrote: > > On Jun 22, 2011, at 6:15 PM, Jim Grosbach wrote: > >> >> On Jun 22, 2011, at 9:00 AM, Renato Golin wrote: >> >>> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >>>>> This sounds like a dead end as newer binutils are GPLv3. >>>> >>>> Yeah,

On Jun 22, 2011, at 7:27 PM, Jim Grosbach wrote: >> I will try to find those pre-v3 patches. >> >> In meantime I wrote a patch which changes to old mnemonics for shift instructions. >> This fixes compiling on the freebsd. > > If this is really the only issue you're seeing, we may be lucky and your binutils already have support for lots of the changes necessary

On Jun 22, 2011, at 7:22 AM, Renato Golin wrote: > On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: >> Problem is that in case when old binutils are used (in my case freebsd is using old one due to license upgrade to GPLv3) AS doesn't understand new mnemonics and fails. > > Indeed, this is new in ARM ARM v7. > > >> Can we change to

On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: > Problem is that in case when old binutils are used (in my case freebsd is using old one due to license upgrade to GPLv3) AS doesn't understand new mnemonics and fails. Indeed, this is new in ARM ARM v7. > Can we change to old mnemonic at least when ARMv4 and ARMv5 code is generated? We definitely should.

On Jun 22, 2011, at 5:29 PM, Jim Grosbach wrote: > > On Jun 22, 2011, at 7:22 AM, Renato Golin wrote: > >> On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: >>> Problem is that in case when old binutils are used (in my case freebsd is using old one due to license upgrade to GPLv3) AS doesn't understand new mnemonics and fails. >>

On Jun 22, 2011, at 6:15 PM, Jim Grosbach wrote: > > On Jun 22, 2011, at 9:00 AM, Renato Golin wrote: > >> On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >>>> This sounds like a dead end as newer binutils are GPLv3. >>> >>> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser

On Jun 22, 2011, at 4:02 PM, Damjan Marion wrote: >> >> To get -integrated-as working so that we don't need to go through the assembler at all should be mostly a matter of bug fixing, modulo inline assembly support. For non-trivial inline assembly, and to get a system assembler replacement based on the MC assembler, it'll be a bigger task. The ARM asm parser is currently in

On Jun 23, 2011, at 1:13 AM, Jim Grosbach wrote: > On Jun 22, 2011, at 4:02 PM, Damjan Marion wrote: >>> >>> To get -integrated-as working so that we don't need to go through the assembler at all should be mostly a matter of bug fixing, modulo inline assembly support. For non-trivial inline assembly, and to get a system assembler replacement based on the MC assembler,

On Jun 22, 2011, at 9:00 AM, Renato Golin wrote: > On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >>> This sounds like a dead end as newer binutils are GPLv3. >> >> Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser whipped into usable shape. We're much more in control of our own destiny then.

On Jun 23, 2011, at 12:01 AM, Jim Grosbach wrote: > > On Jun 22, 2011, at 2:08 PM, Renato Golin wrote: > >> On 22 June 2011 19:18, Anton Korobeynikov <anton at korobeynikov.info> wrote: >>> Unfortunately, you have to live with this. Until recently binutils >>> were quite buggy wrt thumb2 code, so, most probably you will need new >>> binutils in

On Jun 22, 2011, at 2:08 PM, Renato Golin wrote: > On 22 June 2011 19:18, Anton Korobeynikov <anton at korobeynikov.info> wrote: >> Unfortunately, you have to live with this. Until recently binutils >> were quite buggy wrt thumb2 code, so, most probably you will need new >> binutils in any case. > > Hi Anton, > > It's not so simple. GPL3 can be quite a

On Jun 22, 2011, at 8:39 AM, Damjan Marion wrote: > > On Jun 22, 2011, at 5:29 PM, Jim Grosbach wrote: > >> >> On Jun 22, 2011, at 7:22 AM, Renato Golin wrote: >> >>> On 22 June 2011 14:33, Damjan Marion <damjan.marion at gmail.com> wrote: >>>> Problem is that in case when old binutils are used (in my case freebsd is using old one due to

In the help command when i checked the processors supported by llvm 2.9 it showed arm926ej-s. which means thumb mode is supported right? this belongs to armv5. but the llvm documentation says thumb mode is supported only for armv6 and higher.. does it mean there is only a partial support for this processor? -------------- next part -------------- An HTML attachment was scrubbed... URL:

On 22 June 2011 16:50, Jim Grosbach <grosbach at apple.com> wrote: >> This sounds like a dead end as newer binutils are GPLv3. > > Yeah, that's definitely a very real concern and a big motivation to get the MC based asm parser whipped into usable shape. We're much more in control of our own destiny then. So, how do we solve the problem until then? cheers, --renato

Hi Damjan, > This sounds like a dead end as newer binutils are GPLv3. Unfortunately, you have to live with this. Until recently binutils were quite buggy wrt thumb2 code, so, most probably you will need new binutils in any case. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

Hi all, I'm trying to use libspeex 1.1.10 on an ARM926EJ-Sid(wb) rev 3 (v5l). I executed the speexenc and speexdec test files and they can encode and decode. But I'm getting 95% of cpu utilization on the codification and 44% on the decodification. I saw in the post: http://lists.xiph.org/pipermail/speex-dev/2005-June/003485.html that this version of speex works fine on ARM

Hi, I am using a cross compiler to compiler for the arm5 architecture. For this architecture it is not allowed that a destination register is also used as source register. In 2007 a patch was discussed at the mailing list, however my compiler still is producing this result. Does anyone know if this patch is actually applied? * I use the following arguments: llvm-gcc -mfpu=vfp -mlittle-endian