similar to: [LLVMdev] Advice on architecture research project?

Benjamin Ylvisaker <benjaminy at alumni.cmu.edu> writes: > I am interested in working on a little architecture project that > involves modifying an ISA in some non-trivial ways and seeing what > impact it has on instruction frequencies (and other such metrics). > Clearly I'll need to hack on a compiler backend, and I thought that > LLVM might be a good choice

On Jun 9, 2011, at 8:09 PM, David A. Greene wrote: > Note that things like instruction frequencies are highly ISA- > dependent. If possible, it is best to evaluate your ideas on more > than one target, just to see what the effects are. What other sorts > of things do you want to study? > > If, long-term, you are planning to do serious studies of performance >

> I am interested in working on a little architecture project that > involves modifying an ISA in some non-trivial ways and seeing what > impact it has on instruction frequencies (and other such metrics). > Clearly I'll need to hack on a compiler backend, and I thought that > LLVM might be a good choice since among mature compiler > infrastructures it's fairly young and

* Premachandra Mallappa: > [AMD Public Use] > > Hi Floarian, > >> I'm including a proposal for the levels below. I use single letters for them, but I expect that the concrete implementation of this proposal will use >> names like “x86-100”, “x86-101”, like in the glibc patch referenced above. (But we can discuss other approaches.) > > Personally I am not a big

Hello, On Wed, 22 Jul 2020, Mallappa, Premachandra wrote: > > That's deliberate, so that we can use the same x86-* names for 32-bit library selection (once we define matching micro-architecture levels there). > > Understood. > > > If numbers are out, what should we use instead? > > x86-sse4, x86-avx2, x86-avx512? Would that work? > > Yes please, I think

On Oct 25, 2011, at 9:29 AM, David A. Greene wrote: > Dan Gohman <gohman at apple.com> writes: > >> I'm removing old targets that no longer appear actively maintained, >> to reduce the burden for target-independent codegen maintenance. >> >> Does anyone object to the removal of the Alpha backend? > > It would be a shame to lose it. Alpha is an

Hi all, I'm new to LLVM dev mailling list and I'm starting to discover some aspects of LLVM. Actually I'm looking for a solution to create a tool chain for my own chip (a 8bit micro controller processor) that include a compiler/linker/assembler toolset and a simulator/debugger. >From what I've read, LLVM is a good tool to implement a compiler for this proprietary platform,

Most Linux distributions still compile against the original x86-64 baseline that was based on the AMD K8 (minus the 3DNow! parts, for Intel EM64T compatibility). There has been an attempt to use the existing AT_PLATFORM-based loading mechanism in the glibc dynamic linker to enable a selection of optimized libraries. But the general selection mechanism in glibc is problematic: hwcaps

Hi all, I'm primarily a hardware person but would like to do some compiler-architecture co-design research. Are there any good references for the NVPTX backend? I'd like to change that backend to have a limited number of physical registers rather than an unlimited number of virtual ones (for more realistic modeling in a uarch simulator). Being able to do register allocation and other

On 13.07.2020 09:40, Florian Weimer wrote: > * Richard Biener: >>> 2. I have a library with AVX2 and FMA, which directory should it go? >> >> Eventually GCC/gas can annotate objects with the lowest architecture >> level that is applicable? > > H.J. has patches for ELF program properties. I think > GNU_PROPERTY_X86_ISA_1_NEEDED would convey this information.

Our 8-bit port for PIC16 has taken roughly about 18 months to get to where we are now. Our instruction set is not orthogonal, data memory is banked, program memory is paged, there is only one accumulator and two pointer registers, and the use of indirect memory access is really expensive. So we had to implement some non conventional approaches to get the model working. For the most part, LLVM

Bill Wendling <wendling at apple.com> writes: > Improving the test suite is always welcome. Do we have an idea of what sorts of improvements we'd like? Any codes that we want to add, for example? What would be useful for ARM? > In addition, we send out pre-release tarballs and have people in the > community build and test their programs with it. This is not a perfect >

On Tue, Oct 25, 2011 at 12:20 PM, Chris Lattner <clattner at apple.com> wrote: > > On Oct 25, 2011, at 9:29 AM, David A. Greene wrote: > >> Dan Gohman <gohman at apple.com> writes: >> >>> I'm removing old targets that no longer appear actively maintained, >>> to reduce the burden for target-independent codegen maintenance. >>>

Hello. I'd like to advertise the LLVM back end I developed in the last 2 years for the research Connex wide SIMD processor, which can have up to 4096 lanes. The Connex SIMD processor is designed to run efficiently BLAS routins, is an easily reconfigurable low-power processor with scratchpad memory, a shift register for inter-lane communication, a hardware sum-reduction tree and

Hello, I have this problem - I have installation of Xen and Centos 5 (all RPMs are from Centos repositories). I have several DomU virtual machines running on this machine. When I try to copy some bigger amount of data from another physical computer to Dom0/DomU on this machine, the network freezes. The link is still up, I can see that the connection really links on the switch, but nothing is

Hi Raja, I'm open to suggestions. Our current release qualification is to bootstrap the compiler (similar to how GCC does their bootstrapping), run the test suites, and verify that there are no regressions. Improving the test suite is always welcome. In addition, we send out pre-release tarballs and have people in the community build and test their programs with it. This is not a perfect

Assuming I have a firewire card with a supported chipset, is there anything special I need to do in order for the kernel to recognize the card? Shouldn't kudzu "wake up" and configure the card when I boot up after installing it? This is a brand spanking new 4.4 system and a supported Agere chipset firewire card. I'm having trouble tickling devices connected to the card.

Hello, Like many trying and posting here, I''m new to VGA passthrough. Computer was bought, checking compatibility from http://wiki.xen.org/wiki/VTd_HowTo The hardware is mostly not exactly on the list, but mainly new versions of the same series (I think). IOMMU "seems" to be working (not 100% sure what to check). I used debian/wheezy kernel and xen, dom0 and HVM domu.

Hi all, I'm new to the project and will probably ask quite a few obvious questions, so please, bare with me. I'm trying to get my bearings straight as to the general path forward for producing a backend for a custom DSP processor. Currently, I have a port of binutils and a basic simulator (based on SID). I want to make it easier for software engineers to produce code for this

On Sun, Nov 24, 2019 at 12:00 AM Phil Perry <pperry at elrepo.org> wrote: > This list does not accept attachments. Please just post the relevant > line for your ethernet device. or if you're not sure, paste the whole output inline in your message.... something like.... # lspci 00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] RS880 Host Bridge 00:01.0 PCI bridge: