similar to: [LLVMdev] LLVMdev Digest, Vol 83, Issue 33

I see, thanks. I used to work with GCC, which has an SSA-property verification run after each pass. It is surprising to find that LLVM does not check this! Jonas > Subject: Re: [LLVMdev] subregisters, def-kill > From: stoklund at 2pi.dk > Date: Thu, 19 May 2011 15:39:40 -0700 > CC: llvmdev at cs.uiuc.edu > To: jnspaulsson at hotmail.com > > > On May 19, 2011, at 7:47

If I write %reg16506<def> = INSERT_SUBREG %reg16506, %reg16445, hi16; #1 %reg16506<def> = INSERT_SUBREG %reg16506, %reg16468, lo16; #2 store %reg16506 #3 it will not coalesce, as LiveVariables: on #2: %16506 gets #2 as a kill #3: %16506 gets #3 as an additional kill LiveIntervalAnalysis:

On May 19, 2011, at 7:47 AM, Jonas Paulsson wrote: > Hi, > > I am combining 16-bit registers to a 32 bit register in order to make a wide store, as per below: > > 732 %reg16506:hi16<def,dead> = COPY %reg16445<kill>; > 740 %reg16506:lo16<def> = COPY %reg16468<kill>; > 748 %r3<def,dead> = store %reg16506<kill>, %r3, > > As you can

Hi, I am combining 16-bit registers to a 32 bit register in order to make a wide store, as per below: 732 %reg16506:hi16<def,dead> = COPY %reg16445<kill>; 740 %reg16506:lo16<def> = COPY %reg16468<kill>; 748 %r3<def,dead> = store %reg16506<kill>, %r3, As you can see, LiveVariables has marked the high part dead, even though the super-register is used at

On May 9, 2011, at 9:00 AM, Jonas Paulsson wrote: > Hi, > > I am trying to take 16 bit memory reads and combine them to a single 32 bit read. I am having trouble to make the code simply read 32 bytes and the use the subregisters accordingly, without unnecessary copying. > > I have tried two techniques, in the MachineFunction: > > 1. replace the MachineOperands in the users

Yes, I'm saying that the implicit-def operand that was added in this case ended up as #4, out of 6, when the operands list was reallocated in addOperand(). If addOperand was rewritten, I think it's best not to add my fix for ProcessUses(), as I wrote earlier. Jonas Subject: Re: [LLVMdev] VirtRegRewriter.cpp: LocalRewriter::ProcessUses() From: stoklund at 2pi.dk Date: Wed, 12 Oct 2011

On Wed, Mar 30, 2011 at 03:19, Julien Henry <Julien.Henry at imag.fr> wrote: > > Actually, I'm working on a static analyzer that computes invariants at > each basicBlock: "In basicBlock B, what is the set of possible > assignments for each live values ?" > and I obtains results such as "In B, we have 0 <= x <= 42" > Well, you have to find that

Hi, [Re-cc'ing list - please hit "reply to all"! :) ] You can't just use your system C and maths libraries when cross-compiling. The C and especially math libraries make lots of assumptions about the underlying system - ABI, endianness and most importantly the assembly language for inline assembly. You will need to cross-compile a C or math library. Cheers, James From:

Hi, thanks a lot for the answer. By mem, I meant optimizations that involves load/store intrinsics, eg llvm.fixPload(). What would the consequences of this be? I ask then, is there any interest at all in the LLVM community for fixed point support in the future? Are there even any local successful projects that you know of? Did you mean that fixed point support in terms of intrinsics and code

Hi Jonas, I won’t have time to look at it this week after all. I’ll try to do that next week. If you do not hear back from me by end of next, do not hesitate to ping me! Cheers, -Quentin > On Apr 22, 2015, at 9:32 AM, Quentin Colombet <qcolombet at apple.com> wrote: > >> >> On Apr 21, 2015, at 11:49 PM, Jonas Paulsson <jonas.paulsson at ericsson.com

Hi, I understand the idea behind compare_numeric() is to compare strings containing digits in a special way: Do a normal string-compare up to the point where both string elemnts are numerical. Find then an outcome based on the number of consecutive digits in the strings while disregarding the value of the digits, eg a12b < a123. I guess then this order should hold: a12 == a22 < a1b, for

Hi, all right, no fixed point type in LLVM :-( May I ask then, what could one expect from various optimizations when using intrinsics to support the fixed point type? LTO, Value optimizations, mem ?? Are you saying it is feasible to add intrinsics and some extra optimizers for these, then? Best regards, Jonas > Subject: Re: [LLVMdev] fixed point types > From: clattner at apple.com >

I looked at SplitKit, but I am not sure how to best do it, so it would be great if you could take a look. /Jonas On 2015-04-21 19:35, Quentin Colombet wrote: >> On Apr 21, 2015, at 7:40 AM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: >> >> >>> On Apr 21, 2015, at 05:39, Jonas Paulsson <jonas.paulsson at ericsson.com> wrote: >>> >>>

Hi all, I have an LLVM bitcode file, with several functions in it. I'm trying to inline these functions as much as possible, so that I can obtain a big single function. There is opt -inline, but it is not sufficient. Any idea ? -- Julien Henry http://www-verimag.imag.fr/~jhenry/

Hi Maarten, If you look at the start of basic block 2 (bb2) you'll see the following instruction: %a_addr.0 = phi i32 [ 1, %bb ], [ 0, %bb1 ] ; <i32> [#uses=1] This is an SSA phi node which assigns a value of either 1 or 0 to %a_addr.0 depending on whether control reached the PHI node from basic block bb, or bb1. - Lang. On Thu, Sep 23, 2010 at 11:26 PM, maarten faddegon <

Well, I actually glue my condition-registers already, but as far as I know this only affects the scheduling from the DAG to the MachineFunction. It still happened that a register allocator at -O0 would spill this register for no reason at all in between these instructions. The CopyCost attribute would help me, if the register allocators would factor it in with the spillWeight calculation. I

You can use Clang to compile source to bitcode: clang -c hello.c -emit-llvm -o hello.bc Hope that helps, Philip -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Julien Henry Sent: Friday, May 20, 2011 10:42 AM To: LLVM Developers Mailing List Subject: [LLVMdev] Compile a project into LLVM Bitcode Hi all, I'm trying to

Hi, I have Visual Studio 2008 which builds LLVM just fine. The problem is that I need to build it using Visual Studio 2003. I am trying to figure out what it is about LLVM that makes VS2k3 inadequate and then determine if those parts can be removed so that VS2k3 can build a subset of LLVM, and hopefully the subset of LLVM that I need (which is the code generator). Thanks, Philip From: Aaron

Hi, I am trying to take 16 bit memory reads and combine them to a single 32 bit read. I am having trouble to make the code simply read 32 bytes and the use the subregisters accordingly, without unnecessary copying. I have tried two techniques, in the MachineFunction: 1. replace the MachineOperands in the users of the data with the new register/subregister index. This yields an assert failure

On Apr 22, 2009, at 12:03 AM, Jakob Stoklund Olesen wrote: > I am trying to locate a bug that affects my Blackfin backend. I am > having some trouble understanding the semantics of def/kill flags on > machine operands when using subregisters. > > I compile this function: > > define void @i56_ls(i56 %x) nounwind { > store i56 %x, i56* @i56_s > ret void > } >