similar to: [LLVMdev] External constants and RIP relative addressing

On May 16, 2011, at 6:24 AM, Chris Stavrakakis wrote: > Hi all, > > in llvm-2.8, i declare an external constant of i64 and i want the > instructions that use the value of this constant to use absolute > addressing instead of RIP relative, that is: > > I get: "48 8b 35 00 00 00 00 mov 0x0(%rip),%rsi" #AT&T syntax > But i would prefer: "48 BE

Chris, > You'll have to hack up the code generator, there is no user visible knob to turn off rip relative addressing. Why? One can use medium code model which does not do any rip-rel stuff. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

On 05/17/2011 07:08 PM, Chris Lattner wrote: > Oh right, that could work. > > -Chris > > On May 17, 2011, at 6:25 AM, Anton Korobeynikov<anton at korobeynikov.info> wrote: > >> Chris, >> >>> You'll have to hack up the code generator, there is no user visible knob to turn off rip relative addressing. >> Why? One can use medium code model which

Hi Evan, In -relocation-model=static mode, those tests are now getting code like this leaq A, %rsi movss %xmm0, (%rsi,%rdx,4) instead of this: movss %xmm0, A(,%rdx,4) This is specifically what these tests were written to catch :-). Running them with -relocation-model=pic is hiding the real bug. Dan On Feb 11, 2008, at 11:22 PM, Evan Cheng wrote: > Fixed.

Fixed. However, I wonder if we are doing the right / smart codegen for static codegen. AMD64 ABI document seems to indicate rip relative addressing should be used even in this case (see page 38). You know about about Linux addressing mode than I do. Please check. Thanks, Evan On Feb 12, 2008, at 10:10 AM, Dan Gohman wrote: > Hi Evan, > > In -relocation-model=static mode, those

Hi all, Continuing work on llvm-ml (a MASM assembler)... and my latest obstacle is in enabling MASM's convention that (unless specified) all memory location references should be RIP-relative. Without it, we emit the wrong instructions for "call", "jmp", etc., and anything we build fails at the linking stage. My best attempt at this so far is a small patch to

With LLVM 2.7 is there an easy way to turn off RIP-relative addressing? I'm debugging an issue here and turning off RIP-relative addressing would greatly reduce the number of diffs I have to pour through. Thanks! -Dave

Greetings, I met $subject in master-rt post drm merge, but taking the config (attached) to virgin v4.12-10624-g9967468c0a10, it's reproducible. KERNEL: vmlinux-4.12.0.g9967468-preempt.gz DUMPFILE: vmcore CPUS: 8 DATE: Tue Jul 11 18:55:28 2017 UPTIME: 00:02:03 LOAD AVERAGE: 3.43, 1.39, 0.52 TASKS: 467 NODENAME: homer RELEASE:

Apologies - I apparently remembered part of the issue incorrectly, so this ended up quite confusing. The problem comes when referencing labels in a different section of the binary. To clarify, if I assemble the code: .data foo BYTE 5 .code mov eax, foo with Microsoft's ml64.exe, it emits an object file disassembling to: 0: 8b 05 00 00 00 00 mov eax, dword ptr [rip]

Eli Friedman wrote: > On Thu, Jul 28, 2016 at 6:13 PM, Ramkumar Ramachandra via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> We were just debugging a sporadic crash the other day, when we noticed >> that RIP-relative addressing was being used in a JumpTable, even when >> code and data were well over 4G apart. This is confusing, because we >> picked

On Nov 20, 2013, at 4:11 PM, Ghitulete Razvan <razvan.ghitulete at gmail.com> wrote: > On Wed, Nov 20, 2013 at 8:55 PM, Stephen Checkoway <s at pahtak.org> wrote: >> >> This has come up before <https://groups.google.com/forum/#!topic/llvm-dev/vomnIQjefzA>. I don't recall if there was a resolution. >> > > Thanks for the link, completely missed

Interesting - the patch doesn't address this yet. It looks like we have a difference (maybe bug?) in how we handle Intel vs. AT&T inline assembly: https://godbolt.org/z/GQw9ED Suppose we're expanding an operand with an 'i' constraint, where the operand is given as, e.g. (i32* @Bar). If the inline assembly is in Intel dialect, this expands as "Bar" in AT&T syntax

Hi All, I have a question regarding LLVM backend. I appreciate a lot if anyone can provide some hints. My work here is to avoid base+index address mode for X86 target, to allow base-register only or index-register only address mode. For example, "mov (%rsi), %rbx" is allowed, but "mov (%rsi, %rax), %rbx" is not allowed. I understand LLVM backend is a complex system. Can any

Are you asking what the parsing rules are, or how you should modify the LLVM code to achieve that result? If the latter, you haven’t really given enough detail here. What code, exactly, have you tried modifying? Do you have any ideas for how it could work? -Eli From: Eric Astor <epastor at google.com> Sent: Tuesday, January 21, 2020 2:44 PM To: Eli Friedman <efriedma at

>>> >>last OS I can think of with an actual Bourne shell was Solaris. >>> >> >>> >> >> > >> >The various *BSD's have & use the actual Bourne shell .... >> > >> > > Which one? All the BSDs I know of use the Almquist Shell except for > OpenBSD which uses a patched version of the Public Domain Korn Shell

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Hi. I'm trying to write an application to retrieve financial data (specially bonds data) from FINRA. The web page is served dynamically from an asp.net application: http://cxa.gtm.idmanagedsolutions.com/finra/BondCenter/AdvancedScreener.aspx I'd like to know if it's possible to fill dynamically the web page form from R and, after filling it (with the issuer name), retrieve the web

Hello everyone, I'm hoping someone can help me with this. I have a business customer in the U.S. (Michigan, AT&T Territory). I need to get 4 trunks into an asterisk Box. My intention is to use an Eicon Diva Server card with 2 BRI Circuits. The reason for this is that the business needs DID's on the trunks (20 of them). A full or fractional PRI is overboard for them, as they will

On Fri, Jul 29, 2016 at 9:57 AM, Ramkumar Ramachandra <artagnon at gmail.com> wrote: > Eli Friedman wrote: > > On Thu, Jul 28, 2016 at 6:13 PM, Ramkumar Ramachandra via llvm-dev > > <llvm-dev at lists.llvm.org> wrote: > >> We were just debugging a sporadic crash the other day, when we noticed > >> that RIP-relative addressing was being used in a

I am in the process of implementing a new ISDN pri and have a couple of questions. This is a full 24 channels (23 B and 1 D) delivered over a T1 interface. The interface looks good and is not showing any errors. Any help that you can provide would be greatly appreciated. 1) What switchtype should be configured in the zapata.conf file when AT&T is using CUSTOM? My understanding is that