Displaying 20 results from an estimated 50000 matches similar to: "[LLVMdev] Address mode pointer size support"
2011 Mar 31
0
[LLVMdev] Address mode pointer size support
> Is there any way currently in LLVM to specify different pointer sizes for
> different address spaces?
No.
Ciao, Duncan.
2012 Aug 17
2
[LLVMdev] RFC: Supporting different sized address space arithmetic
> -----Original Message-----
> From: Eli Friedman [mailto:eli.friedman at gmail.com]
> Sent: Friday, August 17, 2012 3:16 PM
> To: Villmow, Micah
> Cc: LLVM Developers Mailing List
> Subject: Re: [LLVMdev] RFC: Supporting different sized address space
> arithmetic
>
> On Fri, Aug 17, 2012 at 2:53 PM, Villmow, Micah <Micah.Villmow at amd.com>
> wrote:
> >
2012 Aug 27
2
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
Most likely this code was added before getSExtOrTruncate was added, but not 100% sure. It seems to assume that no pointer can be more than 64bits in size.
> -----Original Message-----
> From: Hal Finkel [mailto:hfinkel at anl.gov]
> Sent: Friday, August 24, 2012 4:27 PM
> To: Villmow, Micah
> Cc: LLVM Developers Mail
> Subject: Re: [LLVMdev] FW: RFC: Supporting different sized
2012 Sep 11
2
[LLVMdev] Proposal: New IR instruction for casting between address spaces
> -----Original Message-----
> From: Dan Gohman [mailto:gohman at apple.com]
> Sent: Tuesday, September 11, 2012 1:28 PM
> To: Villmow, Micah
> Cc: llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] Proposal: New IR instruction for casting between
> address spaces
>
> On Sep 11, 2012, at 1:03 PM, "Villmow, Micah" <Micah.Villmow at amd.com>
> wrote:
>
2012 Aug 24
5
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
> -----Original Message-----
> From: Villmow, Micah
> Sent: Friday, August 24, 2012 2:56 PM
> To: 'Eli Friedman'
> Cc: LLVM Developers Mailing List
> Subject: RE: [LLVMdev] RFC: Supporting different sized address space
> arithmetic
>
> Eli,
> There is a patch that implements the beginning what I think is the
> correct approach to support the backend
2012 Aug 24
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
Micah,
There are a number of variable names in this patch that don't follow
the naming convention (which specifies that they should start with an
uppercase letter).
> if (PtrBits < 64)
> - OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
> - TLI.getPointerTy(),
> + OffsVal = DAG.getNode(ISD::TRUNCATE,
2012 Sep 12
2
[LLVMdev] Proposal: New IR instruction for casting between address spaces
> -----Original Message-----
> From: Mon P Wang [mailto:monping at apple.com]
> Sent: Wednesday, September 12, 2012 1:12 PM
> To: Villmow, Micah
> Cc: Dan Gohman; llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] Proposal: New IR instruction for casting between
> address spaces
>
> Hi,
>
> On Sep 11, 2012, at 2:30 PM, Villmow, Micah wrote:
>
> >
> >
2012 Aug 27
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
On Mon, 27 Aug 2012 15:25:50 +0000
"Villmow, Micah" <Micah.Villmow at amd.com> wrote:
> Most likely this code was added before getSExtOrTruncate was added,
> but not 100% sure. It seems to assume that no pointer can be more
> than 64bits in size.
Does LLVM generally support pointers of greater than 64 bits?
-Hal
>
> > -----Original Message-----
> >
2012 Aug 17
0
[LLVMdev] RFC: Supporting different sized address space arithmetic
On Fri, Aug 17, 2012 at 2:53 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote:
> Currently LLVM only supports address calculations for a single address
> space(the default). This is problematic when the device pointer type is
> 32/64bits, but there are small distinct memories that only have 16 bits of
> addressing(think GPU's with small software controlled memory
2012 Aug 17
2
[LLVMdev] RFC: Supporting different sized address space arithmetic
Currently LLVM only supports address calculations for a single address space(the default). This is problematic when the device pointer type is 32/64bits, but there are small distinct memories that only have 16 bits of addressing(think GPU's with small software controlled memory segments).
I am proposing a modification to a few API's in SelectionDAG that I believe will fix this problem.
2012 Aug 30
0
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
On Thu, Aug 30, 2012 at 3:27 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote:
>
>
>> -----Original Message-----
>> From: Eli Friedman [mailto:eli.friedman at gmail.com]
>> Sent: Thursday, August 30, 2012 3:03 PM
>> To: Villmow, Micah
>> Cc: LLVM Developers Mail
>> Subject: Re: [LLVMdev] FW: RFC: Supporting different sized address space
>>
2012 Sep 11
2
[LLVMdev] FW: Proposal: New IR instruction for casting between address spaces
From: Villmow, Micah
Sent: Tuesday, September 11, 2012 12:51 PM
To: llvm-commits at cs.uiuc.edu
Subject: Proposal: New IR instruction for casting between address spaces
Problem:
Bit casting between pointers of different address spaces only works if all address space pointers are the same size. With changes from email chain [1][2], support for different pointer sizes breaks the bitcast instruction
2012 Sep 12
0
[LLVMdev] Proposal: New IR instruction for casting between address spaces
Hi,
On Sep 11, 2012, at 2:30 PM, Villmow, Micah wrote:
>
>
>> -----Original Message-----
>> From: Dan Gohman [mailto:gohman at apple.com]
>> Sent: Tuesday, September 11, 2012 1:28 PM
>> To: Villmow, Micah
>> Cc: llvmdev at cs.uiuc.edu
>> Subject: Re: [LLVMdev] Proposal: New IR instruction for casting between
>> address spaces
>>
>>
2012 Sep 11
0
[LLVMdev] Proposal: New IR instruction for casting between address spaces
On Sep 11, 2012, at 1:03 PM, "Villmow, Micah" <Micah.Villmow at amd.com> wrote:
>
> From: Villmow, Micah
> Sent: Tuesday, September 11, 2012 12:51 PM
> To: llvm-commits at cs.uiuc.edu
> Subject: Proposal: New IR instruction for casting between address spaces
>
> Problem:
> Bit casting between pointers of different address spaces only works if all
2012 Sep 13
0
[LLVMdev] Proposal: New IR instruction for casting between address spaces
On Sep 12, 2012, at 2:45 PM, "Villmow, Micah" <Micah.Villmow at amd.com> wrote:
>
>
>> -----Original Message-----
>> From: Mon P Wang [mailto:monping at apple.com]
>> Sent: Wednesday, September 12, 2012 1:12 PM
>> To: Villmow, Micah
>> Cc: Dan Gohman; llvmdev at cs.uiuc.edu
>> Subject: Re: [LLVMdev] Proposal: New IR instruction for
2012 Aug 30
4
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
> -----Original Message-----
> From: Eli Friedman [mailto:eli.friedman at gmail.com]
> Sent: Thursday, August 30, 2012 3:03 PM
> To: Villmow, Micah
> Cc: LLVM Developers Mail
> Subject: Re: [LLVMdev] FW: RFC: Supporting different sized address space
> arithmetic
>
> On Thu, Aug 30, 2012 at 2:38 PM, Villmow, Micah <Micah.Villmow at amd.com>
> wrote:
> >
2012 Sep 13
2
[LLVMdev] Proposal: New IR instruction for casting between address spaces
> -----Original Message-----
> From: Mon Ping Wang [mailto:monping at apple.com]
> Sent: Thursday, September 13, 2012 1:55 AM
> To: Villmow, Micah
> Cc: llvmdev at cs.uiuc.edu
> Subject: Re: [LLVMdev] Proposal: New IR instruction for casting between
> address spaces
>
>
> On Sep 12, 2012, at 2:45 PM, "Villmow, Micah" <Micah.Villmow at amd.com>
>
2012 Sep 06
1
[LLVMdev] FW: RFC: Supporting different sized address space arithmetic
Doh! hit send too soon, patch attached.
> -----Original Message-----
> From: Villmow, Micah
> Sent: Thursday, September 06, 2012 9:17 AM
> To: 'Eli Friedman'
> Cc: LLVM Developers Mail
> Subject: RE: [LLVMdev] FW: RFC: Supporting different sized address space
> arithmetic
>
> Eli,
> Here is the first of many patches that adds support for specifying
>
2012 Sep 20
3
[LLVMdev] Proposal: New IR instruction for casting between address spaces
If I don't bring in TargetData, then there is no way for me to verify the address space size in the verifier or in the auto-upgrade mechanisms.
> -----Original Message-----
> From: Eli Friedman [mailto:eli.friedman at gmail.com]
> Sent: Thursday, September 20, 2012 2:32 PM
> To: Villmow, Micah
> Cc: Chris Lattner; Mon Ping Wang; llvm-commits at cs.uiuc.edu;
> llvmdev at
2012 Sep 20
2
[LLVMdev] Proposal: New IR instruction for casting between address spaces
Ping!
> -----Original Message-----
> From: Villmow, Micah
> Sent: Tuesday, September 18, 2012 4:12 PM
> To: 'Chris Lattner'; 'Mon Ping Wang'
> Cc: 'llvm-commits at cs.uiuc.edu'; 'llvmdev at cs.uiuc.edu'
> Subject: RE: [LLVMdev] Proposal: New IR instruction for casting between
> address spaces
>
> Resending since I got an error.
>