similar to: [LLVMdev] ARM mapping symbols

On Mar 29, 2011, at 8:44 AM, Renato Golin wrote: > Hi there, > > I've created a bug on llvm: > > http://www.llvm.org/bugs/show_bug.cgi?id=9582 > > Basically, ARM, Thumb and data mapping symbols should have been > exported in the ELF file, so the linker can work correctly. > > I can do the change and create some test cases, but I haven't been > paying

Hi Everyone, I am trying to decide on a MC'ized reorg of ARMAsmPrinter for MC/ELF, and had some questions. Currently, it defines quite a few methods like printAddrMode4Operand (linked to ARMInstrInfo.td) that currently assume raw text support in the OutStreamer. Are these methods still supposed to be invoked in the MC'ized path for assembly output? Is JimG's new MC/.s

On Sep 29, 2010, at 3:09 PM, Jason Kim wrote: > Hi Everyone, > > I am trying to decide on a MC'ized reorg of ARMAsmPrinter for MC/ELF, > and had some questions. > > Currently, it defines quite a few methods like printAddrMode4Operand > (linked to ARMInstrInfo.td) that currently assume raw text support in > the OutStreamer. Are these methods still supposed to be

+llvmdev -llvmcommits On Fri, Nov 12, 2010 at 8:03 AM, Jim Grosbach <grosbach at apple.com> wrote: > Sorta. getBinaryCodeForInst() is auto-generated by tablegen, so shouldn't be modified directly. The target can register hooks for instruction operands for any special encoding needs, including registering fixups, using the EncoderMethod string. For an example, have a look at the

ARM backend emits different eabi build attributes based on the ISA variant the target supports or whether certain fast-math options are passed on the command line. For example, these are the attributes that have different values depending on whether -ffast-math is passed to clang: $ clang -target armv7-linux-gnueabi -ffast-math (with -ffast-math) .eabi_attribute 20, 2 @ Tag_ABI_FP_denormal

I have created a small ll file to reproduce the problem. I used the intrinsic function llvm.arm.space to introduce space between the beginning of the code and the jump table. If the first argument of llvm.arm.space is higher than INT_MAX ( *2147483647)*, then the bug is hit. Lower or equal to that value, it passes. It looks like a precision issue. Does this sound familiar to someone? ; ModuleID =

Hi everyone, I am in the process of adding some new code for th ARM/MC ELF emission, but noticed a curious linkage between th AsmPrinter and the MC. It looks like the MC code (on X86 at least) calls out to the (misnamed?) AsmPrinter to dump out ELF bits (in X86AsmPrinter.cpp) in the same routine, using conditional branching.... As JimG and I are working both on ARM emission stuff, I want to

In the ARM backend, functions (and other 32 bit constants) are placed in a pool and loaded when needed. A problem with this is that ".weak" directives must be printed in the pool. This is not supported in the standard printer, so I think that I have found the first use for MachineConstantPoolValue :-) Creating the constant is easy, but I have two problems: 1) what are the methods

On Sun, Jul 11, 2010 at 6:10 PM, Chris Lattner <clattner at apple.com> wrote: > This probably needs to be slightly tweaked to work with mainline.  I don't see anything objectionable, but I think Daniel needs to review this one. Updated patch to work with mainline. http://github.com/Bigcheese/llvm-mirror/commit/d19a4c82c18afc4830c09b70f02d162292231c94 - Michael Spencer

Hi, I'm building a new backend which can only load very limited range of imm. So I decided to use constant pool, and place constant pool entries close enough to instructions use the entries (we have very limited range PC-relative memory load). However, lld & llc output the object files that gather all constant pool entries into one section. How can I make them mix these entries into code

Hi Renato, As far as I understand, such issues should be caught by the tests in compiler-rt/test/xray/TestCases/Linux. I found the following lines in compiler-rt/test/xray/lit.cfg that seem to disable the tests for non-64-bit targets: if config.host_os not in ['Linux'] or config.host_arch.find('64') == -1: config.unsupported = True @Serge: You will need to change this

Sharing with the mailing list... Please, see below. On 9 January 2017 at 23:45, Serge Rogatch <serge.rogatch at gmail.com> wrote: > Hi Dean, > > I have seen that you removed the following code from ARMAsmPrinter.cpp in > revision 290858: > // Emit the XRay table for this function. > EmitXRayTable(); > > Was this done by mistake or on purpose? > > Without

On Thu, Oct 21, 2010 at 7:50 AM, Rafael Espíndola <rafael.espindola at gmail.com> wrote: >> Hmm, I wish we had this discussion way earlier.. >> >> How would I emit things in different subsections? I can do a high >> level switch to .ARM.attributes, and if I were emitting one blob from >> begin to end, using the higher level interface would be preferable,

I am trying to write a skeleton of an ARM back end. I have declared the following class class InstARM<dag ops, string asmstr, list<dag> pattern> : Instruction { let Namespace = "ARM"; dag OperandList = ops; let AsmString = asmstr; let Pattern = pattern; } and defined three instructions (ldr, str, and mov). The problem is that, in the generated code, the

On Jul 7, 2011, at 12:08 PM, Villmow, Micah wrote: > We are running into trouble with debug information in that we have registers along with sub registers, and they both point to the same dwarf register. Does LLVM support the DW_OP_piece/bit_piece debug information when allocating a sub-register from a super register? If not, is there any plan to add it? If not, would it be difficult to add?

Hi all, I'm trying to see if I can use a global static base register instead of PC-relative addressing. I see that I can easily reserve R9 in the ARM Subtarget, but this doesn't let me use it. I found a TODO in ARMAsmPrinter.cpp that refers to this: // TODO: We currently only support either reserving the register, or treating // it as another callee-saved register, but not as SB or a

> Also what is the preferred method for MC way of setting out subsection > sizes after the fact? I am guessing I need to use an MCFixup? > How do I get an MCExpr to evaluate a method for the subsection size? > Is there an equivalent use in the places using MCFixup? > Do I need to add a new subclass to MCExpr for doing this? > > JimG, can you please comment on the MachO

I am working towards a more complete solution for large constants in mips 16 (ala Arm constant islands and such). That is part of why I'm busy expanding all macros being emitted in the mips 16 compiler (almost done). I'm wondering if there is a poor mans approach for large constants that can be done very simply that I can add just for now. Gcc mips 16 places them after the function

Based on cmake/modules/LLVMLibDeps.cmake, I produced a graphviz dot file and then manually removed components and edges until the graph was small enough to be presentable. I don't know if I can actually use LLVM due to its humongousness, but I hope the graph will be helpful to others attempting to comprehend LLVM. PNG attached; dot file follows. digraph G { ipo

Hello, Everyone, I am a student an a new learner of R and I am trying to do my homework in R. I have 10 files need to be read and process seperately. I really want to write the codes into something like "macro" to save the lines instead of repeating 10 times of similar work. The following is part of my codes and I only extracted three lines for each repeating section. data.1 <-