similar to: [LLVMdev] Calling external functions failed on PowerPC

Hi, all I found the example code examples/HowToUseJIT.cpp also shows the same error. Attachment is the LLVM module created by HowToUseJIT. And here is the error, Running foo: %X4<def> = LDtoc <ga:@add1>, %X2 UNREACHABLE executed! Stack dump: 0. Running pass 'PowerPC Machine Code Emitter' on function '@foo' Aborted Currently, I use gdb try to track down

Hi all, I'm compiling current SVN HEAD on Linux/x86. The tests are failing on PowerPC due to the following assertion failure : JITTests: PPCCodeEmitter.cpp:152: unsigned int<unnamed>::PPCCodeEmitter:: getMachineOpValue(const llvm::MachineInstr&, const llvm::MachineOperand&) const: Assertion `MovePCtoLROffset && "MovePCtoLR not seen yet?"'

Erik de Castro Lopo <mle+cl <at> mega-nerd.com> writes: > > Hi all, > > I'm compiling current SVN HEAD on Linux/x86. The tests are failing > on PowerPC due to the following assertion failure : > > JITTests: PPCCodeEmitter.cpp:152: unsigned int<unnamed>::PPCCodeEmitter:: > getMachineOpValue(const llvm::MachineInstr&, const

I'm not working on it, but I might be able to help find the problem. What this means is that you're generating code in PIC mode, and an object that requires a PIC register to reference is being addressed, and no PIC register was allocated. The allocation was supposed to happen in PPCDAGtoDAGISel::Select when the reference was processed, and a MovePCtoLR instruction inserted at that

Dale Johannesen wrote: > I'm not working on it, but I might be able to help find the problem. > What this means is that you're generating code in PIC mode, and an > object that requires a PIC register to reference is being addressed, > and no PIC register was allocated. The allocation was supposed to > happen in PPCDAGtoDAGISel::Select when the reference was processed,

Erik de Castro Lopo <mle+cl <at> mega-nerd.com> writes: > > Hi all, > > I'm compiling current SVN HEAD on Linux/x86. The tests are failing > on PowerPC due to the following assertion failure : > > JITTests: PPCCodeEmitter.cpp:152: unsigned int<unnamed>::PPCCodeEmitter:: > getMachineOpValue(const llvm::MachineInstr&, const

This time make world on Ubuntu 10.04 gives following error gcc -O2 -fomit-frame-pointer -m32 -march=i686 -fno-strict-aliasing -std=gnu99 -Wall -Wstrict-prototypes -Wno-unused-value -Wdeclaration-after-statement -D__XEN_TOOLS__ -MMD -MF .fsimage.so.d -D_LARGEFILE_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -D_LARGEFILE64_SOURCE -mno-tls-direct-seg-refs -I../../../tools/libfsimage/common/

D. Johnson wrote: > I added build, host, target = ppc-unknown-linux-gnu and enabled libffi. One of > hese gets rid of the assert errors. I'm guessing the B,H,T addition. Confirmed. Configuring with: ./configure --host=ppc-unknown-linux-gnu --build=ppc-unknown-linux-gnu \ --target=ppc-unknown-linux-gnu passed all tests. > Configure script guessed ppc64. I

On Sun, 31 Oct 2010 13:31:58 +1100 Erik de Castro Lopo <mle+cl at mega-nerd.com> wrote: > D. Johnson wrote: > > > I added build, host, target = ppc-unknown-linux-gnu and enabled > > libffi. One of hese gets rid of the assert errors. I'm guessing the > > B,H,T addition. > > Confirmed. Configuring with: > > ./configure

>> 2) Same error but some diff. problem with AlphaCodeEmitter.cpp and >> PPCCodeEmitter.cpp: >> >> GCC don't like definition member-functions in global namespace with >> declaration in llvm::<unnamed> : Sorry for wrong comment. Must be: GCC 4.1.0 don't like definition member-functions in llvm namespace with declaration in

Hi! I have some problems with build current CVS version LLVM using GCC 4.1.0 (GCC CVS mainline version). 1) Build terminate with error: llvm[3]: Compiling SparcV8CodeEmitter.cpp for Debug build /usr/home/wanderer/pkg/build/llvm/obj/lib/Target/SparcV8/SparcV8GenCodeEmitter.inc:11: error: definition of 'unsigned int

On Mon, 24 Oct 2005, Vladimir A. Merzliakov wrote: > I have some problems with build current CVS version LLVM using GCC 4.1.0 (GCC > CVS mainline version). Thanks! > 1) Build terminate with error: > > llvm[3]: Compiling SparcV8CodeEmitter.cpp for Debug build > /usr/home/wanderer/pkg/build/llvm/obj/lib/Target/SparcV8/SparcV8GenCodeEmitter.inc:11: > error: definition of

Hi everyone, Here's a patch that enables exception handling when jitting. I've copy/pasted _many_code from lib/Codegen/DwarfWriter.cpp, so we may need to factorize it, but the functionality is there and I'm very happy with it :) lli should now be able to execute the output from llvm-gcc when using exceptions (the UnwindInst instruction is not involved in this patch). Just add the

On Mon, 16 Jun 2008, Gary Benson wrote: > When you genetate code on PowerPC you need to explicitly invalidate > the instruction cache to force the processor to reread it. In LLVM > there is code to do this for function stubs on Macintosh, but not > for other platforms and not for JITted code generally. Applied, thanks!

Hi all, When you genetate code on PowerPC you need to explicitly invalidate the instruction cache to force the processor to reread it. In LLVM there is code to do this for function stubs on Macintosh, but not for other platforms and not for JITted code generally. The attached patch adds support for GNU platforms, but I can't figure out a nice way to call it for all generated code. Can

Dear all, Here's a new patch with Evan's comments (thx Evan!) and some cleanups. Now the (duplicated) exception handling code is in a new file: lib/ExecutionEngine/JIT/JITDwarfEmitter. This patch should work on linux/x86 and linux/ppc (tested). Nicolas -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: jit-exceptions.patch URL:

On Dec 10, 2007, at 9:52 AM, Nicolas Geoffray wrote: > Hi everyone, > > Here's a patch that enables exception handling when jitting. I've > copy/pasted _many_code from lib/Codegen/DwarfWriter.cpp, so we may > need > to factorize it, but the functionality is there and I'm very happy > with > it :) Very nice! I don't know enough about EH, someone else

Hi all, I'm trying to figure out how to add the instructions required for llvm.atomic.cmp.swap.i32 on PowerPC. I figured out LWARX (patch attached) but the other two (CMP_UNRESw and STWCX) require multiple instructions: let Defs = [CR0] in { def STWCX : Pseudo<(outs), (ins GPRC:$rS, memrr:$dst, i32imm:$label), "stwcx. $rS, $dst\n\tbne-

Hello again, I am trying to implement an optimization pass for PowerPC such that simple loops use the special "counter register" (CTR) to track the induction variable. This is helpful because, in addition to reducing register pressure, there is a combined decrement-compare-and-branch instruction BZND (there are also other related instructions). I started this process by converting the

On Jun 27, 2008, at 8:27 AM, Gary Benson wrote: > def CMP_UNRESw : Pseudo<(outs), (ins GPRC:$rA, GPRC:$rB, i32imm: > $label), > "cmpw $rA, $rB\n\tbne- La${label}_exit", > [(PPCcmp_unres GPRC:$rA, GPRC:$rB, imm: > $label)]>; > } > > ...and I can't figure out the syntax for that. Any suggestions? Hi