similar to: [LLVMdev] LLVM vs GCC binary performance

Displaying 20 results from an estimated 8000 matches similar to: "[LLVMdev] LLVM vs GCC binary performance"

2011 Mar 11
0
[LLVMdev] LLVM vs GCC binary performance
Hi Yuli, > As a developer I'm very excited and interested in the LLVM project. Though my > knowledge of the details is cursory my general understanding is that the SSA > code that LLVM front ends produce is supposed to allow for optimizations that > are unfeasible in GCC. not so, GCC also uses SSA form. I'm not aware of any optimization that LLVM can do that GCC couldn't
2011 Mar 11
2
[LLVMdev] LLVM vs GCC binary performance
On 11 March 2011 14:53, Duncan Sands <baldrick at free.fr> wrote: > There's no magic bullet.  The things to improve that would give you the most > bang for your buck are probably the code generator and auto-vectorization. > Increasing the number of developers would be helpful. I'm not a GCC expert, but their auto-vectorization is not that great. It may be simple to do basic
2006 Dec 22
1
heatmap with levelplot?
Hi, How do I anchor z=0 to the white color in a levelplot so that the color changes from cyan to magenta precisely as z changes from negative to positive? Also is it easy to change color scheme, say to blue/red as it's more dramatic? Is there a better function for showing heatmap with a color bar? Thanks in advance for any help, I've played with image, heatmap and levelplot a little and
2016 Aug 25
2
Questions on LLVM vectorization diagnostics
Hi, Gerolf. We've been a bit quiet for some time. After listening to feedback on the project internally and externally, we decided to take a more generally accepted community development model ---- building up through a collection of small incremental changes ---- than trying to make a big step forward. That change of course took a bit of time, but we are getting close to the first NFC patch
2016 Aug 30
2
Questions on LLVM vectorization diagnostics
Hi Hideki, Thanks for the interesting writeup! > On Aug 27, 2016, at 7:15 AM, Renato Golin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > On 25 August 2016 at 05:46, Saito, Hideki via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> Now, I have one question. Suppose we'd like to split the vectorization decision as an Analysis pass and vectorization
2016 Sep 19
3
[arm, aarch64] Alignment checking in interleaved access pass
Hi, As a follow up to Patch D23646 <https://reviews.llvm.org/D23646>, I'm trying to figure out if there should be an alignment check and what the correct approach is. Some background: For stores, the pass turns: %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> store <12 x i32> %i.vec, <12 x i32>* %ptr
2015 Jul 01
2
[LLVMdev] C as used/implemented in practice: analysis of responses
On 1 July 2015 at 17:15, Russell Wallace <russell.wallace at gmail.com> wrote: > I'm proposing that LLVM unilaterally replace most undefined behaviour with > implementation-defined behaviour. That's precisely the problem. Which behaviour? Let's have an example: struct Foo { long a[95]; char b[4]; double c[2]; }; void fuzz(Foo &F) { for (int i=0; i<100;
2019 Oct 04
4
vectorize.enable
Thanks for your replies. That was a very useful discussion. I won't recommit on a Friday afternoon, but will do on Monday, as it looks like we agreed again on the direction and the change. Orthogonal to this change, the interesting topics brought up are improved diagnostics, and the cases the vectoriser misses. I will briefly look why this particular case isn't vectorised, but I suspect
2014 Dec 13
2
[LLVMdev] Vectorization factor limitation in Loop Vectorizer
So IMO, if we modify the VF calculation for targets/subtargets using TTI where higher VF is supported The vectorizer’s scope will become wider. Did/do you foresee any issue with this? Thanks, Shahid From: Nadav Rotem [mailto:nrotem at apple.com] Sent: Saturday, December 13, 2014 2:47 AM To: Shahid, Asghar-ahmad Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Vectorization factor limitation in
2019 Oct 02
2
vectorize.enable
Hi Michael and Florian, ( + llvm-dev for visibility) I would like to quickly follow up on "Pragma vectorize_width() implies vectorize(enable)", which got reverted with commit 858a1ae for 2 reasons, see also that revert commit message. Ignore the assert, that's been fixed now. The other thing is that with the patch behaviour is slightly changed and we could get a diagnostic we
2019 Oct 07
2
vectorize.enable
Hi, > The problem I see is that the warning isn't very actionable. Fully agreed. > Good warnings are supposed to be actionable, but what is the developer supposed to do in this case? This diagnostic is unclear. But to be more precise, the first part says the optimisation could not be performed. This is spot on, and an improvement of what we had before because that didn't issue
2018 Sep 13
2
Loop Distribution pass
>I'm just curious as tho which concrete passes would benefit sooner. This all depends on those who are working on other loop xforms, since we currently don't have bandwidth to drive that kind of changes into other loop xforms. That's why when this line of questions pops up, I offer to work together. Short of that, the best we can proactively do is to make vectorizer analyses
2018 Jan 08
2
Suggestions on code generation for SIMD
Thanks Amara so much for the info! One more question: what do people usually do if they want to generate vectorized code for some existing c/c++ code? Do they usually do C/C++ source level transformation, or do at LLVM's IR level? I know clang supports auto vectorizations, such as loop vectorization and SLP, but they are not flexible enough if we want to do more custom vectorizations or
2015 Jul 01
2
[LLVMdev] C as used/implemented in practice: analysis of responses
On 1 July 2015 at 15:20, Russell Wallace <russell.wallace at gmail.com> wrote: > Group all monkey's paw optimisations together, and enable them only if an > extra compiler flag is supplied. Or failing that, at least have a compiler > flag that will disable all of them (while leaving all the safe optimisations > enabled). So, are you suggesting we get rid of all undefined AND
2020 Nov 02
2
Loop-vectorizer prototype for the EPI Project based on the RISC-V Vector Extension (Scalable vectors)
Hi all, At the Barcelona Supercomputing Center, we have been working on an end-to-end vectorizer using scalable vectors for RISC-V Vector extension in context of the EPI Project <https://www.european-processor-initiative.eu/accelerator/>. We earlier shared a demo of our prototype implementation  (https://repo.hca.bsc.es/epic/z/9eYRIF, see below) with the folks involved with LLVM
2017 Feb 02
3
RFC: Generic IR reductions
Thanks for the summary, some more comments inline. On 1 February 2017 at 22:02, Renato Golin <renato.golin at linaro.org> wrote: > On 1 February 2017 at 21:22, Saito, Hideki <hideki.saito at intel.com> wrote: >> I think we are converging enough at the detail level, but having a big >> difference in the opinions at the "vision" level. :) > > Vision is
2016 Feb 09
2
Vectorization with fast-math on irregular ISA sub-sets
----- Original Message ----- > From: "Renato Golin" <renato.golin at linaro.org> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "James Molloy" <James.Molloy at arm.com>, "Nadav Rotem" <nrotem at apple.com>, "Arnold Schwaighofer" > <aschwaighofer at apple.com>, "LLVM Dev" <llvm-dev at
2020 Mar 26
5
canonical form loops
Hello, Quick question to see if I haven't missed anything: I would like convert counting down loops, i.e. loops with a constant -1 step value, to counting up loops, because the vectoriser is able to better deal with these loops (see e.g. D76838 that I was discussing today with Ayal). It looks like LoopSimplifyCFG and IndVarSimplify don't do this. So was just curious if I haven't
2017 Dec 06
5
[LV][VPlan] Status Update on VPlan ----- where we are currently, and what's ahead of us
Status Update on VPlan ---- where we are currently, and what's ahead of us ==========================================================   Goal: ----- Extending Loop Vectorizer (LV) such that it can handle outer loops, via uplifting its infrastructure with VPlan. The goal of this status update is to summarize the progress and the future steps needed.   Background: ----------- This is related to
2011 Mar 11
0
[LLVMdev] LLVM vs GCC binary performance
On 03/11/2011 12:42 PM, Renato Golin wrote: > On 11 March 2011 14:53, Duncan Sands<baldrick at free.fr> wrote: >> There's no magic bullet. The things to improve that would give you the most >> bang for your buck are probably the code generator and auto-vectorization. >> Increasing the number of developers would be helpful. > > I'm not a GCC expert, but