similar to: [LLVMdev] how to use external function?

Displaying 20 results from an estimated 1400 matches similar to: "[LLVMdev] how to use external function?"

2011 Mar 05
0
[LLVMdev] how to use external function?
On Sat, Mar 5, 2011 at 12:41 PM, Amir Mofakhar <pangan at gmail.com> wrote: > Hi there, > > It will be appreciated if you help me : > > I need to call an external function in LLVM bitcode but don't know how : > > ;ModuleID = 'm1' > define i32 @main() { > entry: > %tmp0 = call i32 @MyOwnFunction() >  ret i32 0 >  } >  declare i32
2011 Mar 09
1
[LLVMdev] how to use external function?
Eli Friedman <eli.friedman <at> gmail.com> writes: > > Try something like the following? > > llvm-link MyOwnFunction.bc m1.bc -o - | lli > > -Eli > same error again!
2012 Feb 18
4
assigning NULL to a list element
Hi everyone, For reasons beyond the scope of this message, I'd like to append a NULL element to the end of a list. tmp0 <- list(a=1, b=NULL, c=3) append(tmp0, c(d=4)) ## works as expected append(tmp0, c(d=NULL)) ## list with a/b/c only Given that I could use tmp0$a <- NULL to remove 'a', I seem to understand why appending NULL returns me the original list... But how should I
2012 Jan 10
1
[LLVMdev] SelectionDAG
Hello, I am working on a AVR backend and have a version up and running that will convert LLVM IR code to assembly code for my target. I have written a bunch of instructions from the AVR Instruction Set in AVRInstrInfo.td and not much else. In a simple test case I am attempting to compile (if that is the word you are supposed to use for this operation) test.ll: define i8 @foo(i8 %a, i8 %b) {
2015 May 15
3
[LLVMdev] MIPS asm backend emitting weird symbols into object file?
I'm cross-compiling for MIPS. The test-case is as simple as it can be: void foo() {} $clang -target mips64-octeon-linux -c -B path/to/cross/compiled/mips/assembler a.c And then I look at the object file: $ nm a.o 0000000000000020 t $tmp0 0000000000000000 T foo I would like to know what "$tmp0" is. Furthermore, if I pass -g to clang, I see a whole bunch of such symbols. Some of
2009 Apr 15
2
[LLVMdev] Error w/ Tablegen + Intrinsics
It seems that Tablegen is generating intrinsic ID's off by in DAGISel.inc In DAGISel.inc, I have the following pattern: int64_t CN1 = Tmp0->getZExtValue(); // Pattern: (intrinsic_w_chain:f32 103:iPTR, GPRF32:f32:$src0, GPRF32:f32:$src1, GPRF32:f32:$src2) // Emits: (MACRO_FMA_f32:f32 GPRF32:f32:$src0, GPRF32:f32:$src1, GPRF32:f32:$src2) // Pattern complexity = 8 cost
2011 Aug 19
1
[LLVMdev] Break operands into multiple instructions
Hi All, I am creating an instrumentation pass using LLVM libraries. I am using clang++ (version 2.9) to compile cpp code into LLVM bit code. When I generate the llvm bit code using clang++ using -O3, I get many instances of instructions that look like the following. br i1 icmp ne (i8* bitcast (i32 (i32)* @pthread_cancel to i8*), i8* null), label %bb23, label %bb25 Here three LLVM instructions
2009 Apr 15
0
[LLVMdev] Error w/ Tablegen + Intrinsics
Are you using isTarget = 1 in your intrinsics file? On Apr 14, 2009, at 6:34 PM, Villmow, Micah wrote: > It seems that Tablegen is generating intrinsic ID’s off by in > DAGISel.inc > > In DAGISel.inc, I have the following pattern: > int64_t CN1 = Tmp0->getZExtValue(); > > // Pattern: (intrinsic_w_chain:f32 103:iPTR, GPRF32:f32:$src0, > GPRF32:f32:$src1,
2016 Dec 09
0
BSWAP matching in codegen
On 12/9/2016 11:03 AM, Jim Lewis via llvm-dev wrote: > > Thanks, that helps enormously! The issue is that the match is supposed > to support both cascade and tree OR patterns, but there appears to be > a problem with the tree matching. Both test1 and test6 in the ARM > tests exercise the cascade pattern, and I remember now our fix is > confined to the tree case. > > I
2012 Apr 25
2
[LLVMdev] LLVM Backend for Z80. ADD -> replaced -> OR
Hello. I am playing with LLVM and trying to make Z80 (Zilog Z80) backend. The source code is attached. I have succesfully made some simple test. But now I have problem with ADD instruction. The source C code is: typedef struct { unsigned char id1; unsigned char id2; unsigned char id3; } testS; void simple() { testS test; test.id1 = 0x40; test.id2 = 0x80; test.id3 = 0xc0; } It
2015 Nov 16
2
fallback mount points?
Hello, this is coming from our radio station's icecast config. change at your needs and feel free to use this. <mount> <mount-name>/stream.mp3</mount-name> <fallback-mount>/live.mp3</fallback-mount> <fallback-override>1</fallback-override> <hidden>1</hidden> </mount> <mount>
2011 Jul 23
14
[LLVMdev] RFC: Exception Handling Rewrite
What? Yet another EH proposal?! This one is different from the others in that I'm planning to start implementing this shortly. But I want your feedback! I've all ready gotten a lot of feedback from Chris, John, Jim, Eric, and many others. Now is your turn! Please read this proposal and send me your comments, suggestions, and concerns. -bw
2012 Apr 25
0
[LLVMdev] LLVM Backend for Z80. ADD -> replaced -> OR
Hi Peter, I think the problem is that you did not explicitly define stack alignment in Z80TargetMachine.cpp DataLayout("e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-n8") Try to add S16 to the string if your stack is 2-byte aligned. Refer to http://llvm.org/docs/LangRef.html#datalayout . If it does not work, try to specify the layout in the input module using target layout directive. David On
2004 May 11
2
[LLVMdev] Problems accessing structs
Hello! I get some odd behaviour using my structs: "myKernelMap" = type {int (sbyte*)*, int ()*} "Kernel" = type {"myKernelMap"*} The second member ( int()* ) is a pointer to the %getchar() function. I want to call getchar using this function: int "callmyKernelgetchar_kernel"("Kernel"* "myKernel") { "PTRMAP" =
2015 Nov 17
2
fallback mount points?
Each MountPoint has a different URL, but in the ways that I have described, you don't use it like that. You can have 2 or 3 MountPoints but, one you can just serve as a fallback for all 3 of them. Let's take this example for a few seconds. Say for example, if you had, "http://yourdomain.com:8000/mount1" that will just serve as the listener MountPoint. "/mount2"
2012 Apr 25
1
[LLVMdev] LLVM Backend for Z80. ADD -> replaced -> OR
Hello. I have played with DataLayout and found a solution with is uknown to me. I added S16 and also s0:16:16, but it had not worked. Then I found that in Z80FrameLowering.h I am calling TargetFrameLowering with stack aligment set to 8. So I changed it to 2 bytes. But this also didn't help. Then I changed llc to show TargetDataLayout and found that a option is set to a0:0:64. So I changed
2012 Mar 30
4
[LLVMdev] Google Summer of Code proposal: Adding memory safety checks to the LLVM bitcodes
Dear LLVMers, My name is Raphael Ernani, and I am doing my MsC at the Federal University of Minas Gerais, Brazil. I have been using LLVM for a while, and I would like to participate in this year's Summer of Code. One particular idea, in your "open projects" page caught my eye, and I decided to write a proposal about it. The line that I liked in the page was "Create an LLVM
2012 Mar 30
0
[LLVMdev] Google Summer of Code proposal: Adding memory safety checks to the LLVM bitcodes
On 3/30/12 1:08 PM, Raphael Ernani Rodrigues wrote: > Dear LLVMers, > > My name is Raphael Ernani, and I am doing my MsC at the Federal > University of Minas Gerais, Brazil. I have been using LLVM for a > while, and I would like to participate in this year's Summer of Code. > One particular idea, in your "open projects" page caught my eye, and I > decided to
2010 Dec 07
0
[LLVMdev] RFC: Exception Handling Proposal Revised
Hi Bill, there are a couple of things I didn't understand about your proposal, for example how it interacts with inlining, whether it is feasible to do the "turn invoke-of-Unwind_Resume into a branch" optimization and also whether in "resumedest" you still plan to use _Unwind_Resume to continue unwinding up the stack. Could you please show what the LLVM IR would look like
2014 Sep 26
0
[PATCH] gm107/ir: take relative pfetch offset into account
There is no dedicated instruction for this, so just combine it with the constant offset. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> Cc: "10.3" <mesa-stable at lists.freedesktop.org> --- This fixes the spec/glsl-1.50/execution/geometry/dynamic_input_array_index piglit test. src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp | 5 ++++- 1 file changed,