similar to: [LLVMdev] ConstantPoolValue lifecycle question

Displaying 20 results from an estimated 800 matches similar to: "[LLVMdev] ConstantPoolValue lifecycle question"

2008 Sep 13
2
[LLVMdev] Alignment of constant loads
On Fri, September 12, 2008 11:33 am, Stefanus Du Toit wrote: > Hi, > > We've noticed that constant loads, e.g. of v4f32 types, are not > aligned to the preferred alignment but rather to the ABI alignment, at > least on x86. On x86 targets it's usually 16 for both preferred and ABI. I guess you're using a target with a lower ABI alignment for vectors? > This seems to
2011 May 07
0
[LLVMdev] Question about linking llvm-mc when porting a new backend
Hello all, I am a LLVM newer who want to add a new backend(EBC) into LLVM. After coping the related files from another target and modifying it, I meet a problem when I build the project. The error message is as follows: ================================================================ [ 94%] Built target llvm-dis Linking CXX executable ../../bin/llvm-mc Undefined symbols:
2008 Sep 12
0
[LLVMdev] Alignment of constant loads
Hi, We've noticed that constant loads, e.g. of v4f32 types, are not aligned to the preferred alignment but rather to the ABI alignment, at least on x86. This seems to stem from SelectionDAG::getLoad() being called with an alignment of 0, which then does: if (Alignment == 0) // Ensure that codegen never sees alignment 0 Alignment = getMVTAlignment(VT); Inside getMVTAlignment,
2009 Jun 03
5
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
Hi: This is my first patch submission. Hopefully, this is the proper the protocol. Attached is a patch for the llc ARM backend: Added mechanism to generate switch table in a data section rather than having it interleaved with the code. This is controlled by command line flags and off by default. Also, tried to document and improve the code where I modified it. Robert -------------- next part
2013 Feb 03
1
[LLVMdev] Chain and glue operands should occur at end of operand list
Hi, I got that message from a call to InstrEmitter::AddOperand. I am writing a back end for CortexM0 (for self teaching purposes), I am working on LDR with immediate offset instruction. In the ARM backend, if the offset is 0, the following code is executed by the function ARMDAGToDAGISel::SelectThumbAddrModeImm5S Base = N.getOperand(0); OffImm = CurDAG->getTargetConstant(0, MVT::i32);
2008 Sep 15
0
[LLVMdev] Alignment of constant loads
Hi Dan, > It looks like the best way to do this is to visit the handful of > places in legalize that create loads from constant pools and > add alignment parameters to the getLoad/getExtLoad calls. > > If you move the handling of Alignment==0 out of ScheduleDAGEmit.cpp > and into SelectionDAG::getConstantPool, you can then have legalize > read the alignment from the node,
2011 May 06
0
[LLVMdev] Question about linking llvm-mc when porting a new backend
Hello all, I am a LLVM newer who want to add a new backend(EBC) into LLVM. After coping the related files from another target and modifying it, I meet a problem when I build the project. The error message is as follows: ================================================================ [ 94%] Built target llvm-dis Linking CXX executable ../../bin/llvm-mc Undefined symbols:
2012 Sep 06
0
[LLVMdev] [NVPTX] Backend cannot handle array-of-arrays constant
On 09/04/2012 09:57 AM, Dmitry N. Mikushin wrote: > I think our test case demonstrates that requiring the array item being > initialized to be constant is incorrect. NVPTX does not crash anymore > and produces correct result with the following change: > > --- NVPTXAsmPrinter.cpp 2012-09-03 15:14:00.000000000 +0200 > +++ NVPTXAsmPrinter.cpp 2012-09-04 15:47:17.859398193 +0200 >
2005 Apr 22
1
Expression in panel.text
Hi, I've got a lattice xyplot and I want to superimpose correlation coefficients and p values on each panel. I've been trying to get this to work using something of the form: x <- rnorm(400) y <- rnorm(400) a <- gl(4, 100) xyplot(y~x | a, panel=function(x,y, ...){ panel.xyplot(x,y, ...) curr.cor <- cor.test(x,y) crho <- round(curr.cor$estimate,2)
2011 Oct 13
1
[LLVMdev] VirtRegRewriter.cpp: LocalRewriter::ProcessUses()
Yes, I'm saying that the implicit-def operand that was added in this case ended up as #4, out of 6, when the operands list was reallocated in addOperand(). If addOperand was rewritten, I think it's best not to add my fix for ProcessUses(), as I wrote earlier. Jonas Subject: Re: [LLVMdev] VirtRegRewriter.cpp: LocalRewriter::ProcessUses() From: stoklund at 2pi.dk Date: Wed, 12 Oct 2011
2012 Sep 04
2
[LLVMdev] [NVPTX] Backend cannot handle array-of-arrays constant
I think our test case demonstrates that requiring the array item being initialized to be constant is incorrect. NVPTX does not crash anymore and produces correct result with the following change: --- NVPTXAsmPrinter.cpp 2012-09-03 15:14:00.000000000 +0200 +++ NVPTXAsmPrinter.cpp 2012-09-04 15:47:17.859398193 +0200 @@ -1890,17 +1890,15 @@ case Type::ArrayTyID: case Type::VectorTyID: case
2011 Oct 12
0
[LLVMdev] VirtRegRewriter.cpp: LocalRewriter::ProcessUses()
On Oct 7, 2011, at 8:14 AM, Jonas Paulsson wrote: > Hi, > > I think I've found a bug in this method. > > I ran it on an MI which already had two implicit-use operands, and which defined a register with a subregindex, ie reg::lo16. > > For the def-operand, with a subregindex, an implicit-use operand was added with this code: > >
2011 Oct 07
3
[LLVMdev] VirtRegRewriter.cpp: LocalRewriter::ProcessUses()
Hi, I think I've found a bug in this method. I ran it on an MI which already had two implicit-use operands, and which defined a register with a subregindex, ie reg::lo16. For the def-operand, with a subregindex, an implicit-use operand was added with this code: VirtUseOps.insert(VirtUseOps.begin(), MI.getNumOperands()); MI.addOperand(MachineOperand::CreateReg(VirtReg,
2009 Jun 24
2
[LLVMdev] patch for llc/ARM: added mechanism to move switch tables from .text -> .data; also cleanup and documentation
Evan: Sorry for the late follow up, I was out of town last week. Enclosed please find the updated patch including all your suggestions and a dejagnus test. Robert On Thu, Jun 11, 2009 at 2:27 PM, Evan Cheng <evan.cheng at apple.com> wrote: > > On Jun 8, 2009, at 2:42 PM, robert muth wrote: > > > On Sun, Jun 7, 2009 at 11:53 PM, Evan Cheng <evan.cheng at apple.com>
2016 May 25
0
Re: Windows Server 2008 - KVM
Van: Thiago Oliveira [mailto:cpv.thiago@gmail.com] Verzonden: woensdag 25 mei 2016 14:37 Aan: Dominique Ramaekers CC: libvirt-users@redhat.com Onderwerp: Re: [libvirt-users] Windows Server 2008 - KVM Hi there! I have installed a new VM with Win2k8 and the serial virtio driver works fine. I donĀ“t know why the other VM the BSOD happen! About the performance, I had the impression that only one
2008 Apr 07
0
[LLVMdev] Being able to know the jitted code-size before emitting
On Apr 7, 2008, at 3:02 AM, Nicolas Geoffray wrote: > Hi Evan, > > Evan Cheng wrote: >> >> I don't think the duplication is going to be top much of a problem. >> If >> it is, I'll bug you about refactoring. :) >> >> > > I don't mean to show how lazy I can be, but I also need to know the > size > of the exception table
2008 Mar 31
0
[LLVMdev] Being able to know the jitted code-size before emitting
Hi, Two questions. 1) How are you computing size of the method being jitted? 2) Why not simply add the functionality of allocating emission buffer of specific size to MachineCodeEmitter instead? Thanks, Evan On Mar 30, 2008, at 12:05 PM, Nicolas Geoffray wrote: > Hi everyone, > > vmkit requires to know the size of a jitted method before emitting > the method. This allows to
2008 Apr 01
0
[LLVMdev] Being able to know the jitted code-size before emitting
On Apr 1, 2008, at 12:50 AM, Nicolas Geoffray wrote: > Hi Evan, > > Evan Cheng wrote: >> 1) How are you computing size of the method being >> jitted? > > I add a new pass with addSimpleCodeEmitter, with the emitter being a > SizeEmitter. Since the target calls the emitter with functions such as > writeByte, writeWord, etc.... the SizeEmitter class implements these
2008 Apr 05
0
[LLVMdev] Being able to know the jitted code-size before emitting
On Apr 4, 2008, at 11:16 PM, Nicolas Geoffray <nicolas.geoffray at lip6.fr> wrote: > Evan Cheng wrote: >> >> Let's see. ARM has it already. PPC has getNumBytesForInstruction so >> you only need to add one to compute function size. Also you only need >> to implement it for targets that support JIT right now, which leaves >> Alpha and X86. I'm
2008 Apr 04
0
[LLVMdev] Being able to know the jitted code-size before emitting
On Apr 4, 2008, at 5:50 AM, Nicolas Geoffray wrote: > Evan Cheng wrote: >> On Apr 1, 2008, at 12:50 AM, Nicolas Geoffray wrote: >> >> >> That's a hack. :-) > > It is if you think that code emitter should only be used for actually > writing somewhere the data. It is not if you find it another useful > utility ;-) Except it's pretty slow at it. :-)